LFXP2-8E-5TN144I | |
|---|---|
| Manufacturer Part Number | LFXP2-8E-5TN144I |
| Description | FPGA - Field Programmable Gate Array 8K LUTs 100 I/O Inst on DSP 1.2V -5 Spd |
| Manufacturer | Lattice |
| LFXP2-8E-5TN144I datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
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Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
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Specifications of LFXP2-8E-5TN144I | |||
|---|---|---|---|
| Number Of Macrocells | 8000 | Number Of Programmable I/os | 100 |
| Data Ram Size | 226304 | Supply Voltage (max) | 1.26 V |
| Maximum Operating Temperature | + 100 C | Minimum Operating Temperature | - 40 C |
| Mounting Style | SMD/SMT | Supply Voltage (min) | 1.14 V |
| Package / Case | TQFP-144 | Number Of Logic Elements/cells | * |
| Number Of Labs/clbs | * | Total Ram Bits | 226304 |
| Number Of I /o | 100 | Number Of Gates | - |
| Voltage - Supply | 1.14 V ~ 1.26 V | Mounting Type | * |
| Operating Temperature | -40°C ~ 100°C | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
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PrevNext
Lattice Semiconductor
Figure 10-12. True Dual Port RAM Timing Waveform - NORMAL Mode with Output Registers
Reset
ClockA
t
SUCE_EBR
ClockEnA
t
SUWREN_EBR
WrEnA
t
SUADDR_EBR
Add_A0
AddressA
Data_A0
DataA
t
SUDATA_EBR
QA
ClockB
t
SUCE_EBR
ClockEnB
t
SUWREN_EBR
WrEnB
t
SUADDR_EBR
AddressB
Add_B0
Data_B0
DataB
t
SUDATA_EBR
QB
t
HWREN_EBR
t
HADDR_EBR
Add_A1
Add_A0
Data_A1
t
HDATA_EBR
Invalid Data
t
HWREN_EBR
t
HADDR_EBR
Add_B1
Add_B0
Data_B1
t
HDATA_EBR
Invalid Data
10-14
LatticeXP2 Memory Usage Guide
t
HCE_EBR
Add_A1
Add_A2
Data_A0
Data_A1
t
COO_EBR
t
HCE_EBR
Add_B1
Add_B2
Data_B0
Data_B1
t
COO_EBR
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