LFXP2-8E-5TN144I

Manufacturer Part NumberLFXP2-8E-5TN144I
DescriptionFPGA - Field Programmable Gate Array 8K LUTs 100 I/O Inst on DSP 1.2V -5 Spd
ManufacturerLattice
LFXP2-8E-5TN144I datasheets

Availability: By request

International delivery:

Warranty: 60 days

Shipping & payment terms

Added to cart

 

Specifications of LFXP2-8E-5TN144I

Number Of Macrocells8000Number Of Programmable I/os100
Data Ram Size226304Supply Voltage (max)1.26 V
Maximum Operating Temperature+ 100 CMinimum Operating Temperature- 40 C
Mounting StyleSMD/SMTSupply Voltage (min)1.14 V
Package / CaseTQFP-144Number Of Logic Elements/cells*
Number Of Labs/clbs*Total Ram Bits226304
Number Of I /o100Number Of Gates-
Voltage - Supply1.14 V ~ 1.26 VMounting Type*
Operating Temperature-40°C ~ 100°CLead Free Status / RoHS StatusLead free / RoHS Compliant
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
Page 191
192
Page 192
193
Page 193
194
Page 194
195
Page 195
196
Page 196
197
Page 197
198
Page 198
199
Page 199
200
Page 200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
Page 200/341

Download datasheet (10Mb)Embed
PrevNext
Lattice Semiconductor
LatticeXP2 Memory Usage Guide
Availability of TAG Memory
TAG memory is available most of time on the Slave SPI interface with the following exceptions:
• When the SRAM fuses are being accessed by the JTAG port, Slave SPI interface or refreshing
• When the other Flash cells are being accessed through the JTAG port or Slave SPI interface
• While JTAG BSCAN testing is taking place
• The Slave SPI interface is disabled with the persistent fuse programmed (set to off)
AC Timing
• 25 MHz maximum CLK
• 5 uS minimum read command delay
• 2 mS minimum delay from VCCmin to shifting in the first command
Programming Timing
• 1 sec. maximum erase time
• 5 mS maximum programming time
Programming via the JTAG Interface
.VME files can be generated for the ispVM System software which only programs the TAG memory. These .VME
files are handled according to the standard ispVME flow.
Initializing Memory
In the EBR based ROM or RAM memory modes and the PFU based ROM memory mode, it is possible to specify
the power-on state of each bit in the memory array. Each bit in the memory array can have one of two values: 0 or
1.
Initialization File Format
The initialization file is an ASCII file, which users can create or edit using any ASCII editor. IPexpress supports
three types of memory file formats:
• Binary file
• Hex File
• Addressed Hex
The file name for the memory initialization file is *.mem (<file_name>.mem). Each row depicts the value to be
stored in a particular memory location and the number of characters (or the number of columns) represents the
number of bits for each address (or the width of the memory module).
The Initialization File is primarily used for configuring the ROMs. The EBR in RAM mode can optionally use this Ini-
tialization File also to preload the memory contents.
The TAG memory uses hex or binary non-addressed files. Since it is a SPI, it cannot use the addressed hex file.
10-50