LFXP2-8E-5TN144I | |
|---|---|
| Manufacturer Part Number | LFXP2-8E-5TN144I |
| Description | FPGA - Field Programmable Gate Array 8K LUTs 100 I/O Inst on DSP 1.2V -5 Spd |
| Manufacturer | Lattice |
| LFXP2-8E-5TN144I datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
×
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Specifications of LFXP2-8E-5TN144I | |||
|---|---|---|---|
| Number Of Macrocells | 8000 | Number Of Programmable I/os | 100 |
| Data Ram Size | 226304 | Supply Voltage (max) | 1.26 V |
| Maximum Operating Temperature | + 100 C | Minimum Operating Temperature | - 40 C |
| Mounting Style | SMD/SMT | Supply Voltage (min) | 1.14 V |
| Package / Case | TQFP-144 | Number Of Logic Elements/cells | * |
| Number Of Labs/clbs | * | Total Ram Bits | 226304 |
| Number Of I /o | 100 | Number Of Gates | - |
| Voltage - Supply | 1.14 V ~ 1.26 V | Mounting Type | * |
| Operating Temperature | -40°C ~ 100°C | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
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PrevNext
April 2011
Absolute Maximum Ratings
Supply Voltage V
. . . . . . . . . . . . . . . . . . . -0.5 to 1.32V
CC
Supply Voltage V
. . . . . . . . . . . . . . . . -0.5 to 3.75V
CCAUX
Supply Voltage V
. . . . . . . . . . . . . . . . . . -0.5 to 3.75V
CCJ
4
Supply Voltage V
. . . . . . . . . . . . . . . . -0.5 to 3.75V
CCPLL
Output Supply Voltage V
. . . . . . . . . . . -0.5 to 3.75V
CCIO
Input or I/O Tristate Voltage Applied
Storage Temperature (Ambient) . . . . . . . . . -65 to 150°C
Junction Temperature Under Bias (Tj) . . . . . . . . . +125°C
1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
2. Compliance with the Lattice
Thermal Management
3. All voltages referenced to GND.
4. V
only available on csBGA, PQFP and TQFP packages.
CCPLL
5. Overshoot and undershoot of -2V to (V
Recommended Operating Conditions
Symbol
V
Core Supply Voltage
CC
4, 5
V
Auxiliary Supply Voltage
CCAUX
1
V
PLL Supply Voltage
CCPLL
2, 3, 4
V
I/O Driver Supply Voltage
CCIO
2
V
Supply Voltage for IEEE 1149.1 Test Access Port
CCJ
t
Junction Temperature, Commercial Operation
JCOM
t
Junction Temperature, Industrial Operation
JIND
1. V
only available on csBGA, PQFP and TQFP packages.
CCPLL
2. If V
or V
is set to 1.2V, they must be connected to the same power supply as V
CCIO
CCJ
nected to the same power supply as V
3. See recommended voltages by I/O standard in subsequent table.
4. To ensure proper I/O behavior, V
CCIO
5. In fpBGA and ftBGA packages, the PLLs are connected to, and powered from, the auxiliary power supply.
On-Chip Flash Memory Specifications
Symbol
Flash Programming Cycles per t
N
PROGCYC
Flash Functional Programming Cycles
1. The minimum data retention, t
RETENTION
© 2011 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
LatticeXP2 Family Data Sheet
DC and Switching Characteristics
1, 2, 3
5
. . . . . . -0.5 to 3.75V
document is required.
+ 2) volts is permitted for a duration of <20 ns.
IHMAX
Parameter
.
CCAUX
must be turned off at the same time or earlier than V
Parameter
1
RETENTION
, is 20 years.
3-1
Data Sheet DS1009
Min.
Max.
1.14
1.26
3.135
3.465
3.135
3.465
1.14
3.465
1.14
3.465
0
85
-40
100
If V
or V
is set to 3.3V, they must be con-
CC.
CCIO
CCJ
CCAUX.
Max.
10,000
100,000
DS1009
DC and Switching_01.7
Units
V
V
V
V
V
°C
°C
Units
Cycles
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