A3PN030-ZQNG68 Actel, A3PN030-ZQNG68 Datasheet - Page 15

• Manufacturer Part Number: A3PN030-ZQNG68
• Description: FPGA - Field Programmable Gate Array 30K System Gates ProASIC3 nano
• Manufacturer: Actel

Specifications of A3PN030-ZQNG68

• Processor Series: A3PN030
• Core: IP Core
• Number Of Macrocells: 256
• Maximum Operating Frequency: 350 MHz
• Number Of Programmable I/os: 49
• Supply Voltage (max): 3.3 V
• Supply Current: 2 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 20 C
• Development Tools By Supplier: AGLN-Nano-Kit, AGLN-Z-Nano-Kit, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FloasPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.5 V
• Number Of Gates: 30 K
• Package / Case: QFN-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2 – ProASIC3 nano DC and Switching Characteristics
General Specifications
Table 2-1 • Absolute Maximum Ratings
Symbol
VCC
VJTAG
VPUMP
VCCPLL
VCCI
VI
T
T
Notes:
1. For flash programming and retention maximum limits, refer to
2. The device should be operated within the limits specified by the datasheet. During transitions, the input signal may
STG
J
1
limits, refer to
undershoot or overshoot according to the limits shown in
1
The Z feature grade does not support the enhanced nano features of Schmitt trigger input, cold-sparing,
and hot-swap I/O capability. Refer to the
more information.
DC and switching characteristics for –F speed grade targets are based only on simulation.
The characteristics provided for the –F speed grade are subject to change after establishing FPGA
specifications. Some restrictions might be added and will be reflected in future revisions of this
document. The –F speed grade is only supported in the commercial temperature range.
Operating Conditions
Stresses beyond those listed in
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings are stress ratings only; functional operation of the device at these or any
other conditions beyond those listed under the Recommended Operating Conditions specified in
Table 2-2 on page 2-2
Table 2-2 on page
DC core supply voltage
JTAG DC voltage
Programming voltage
Analog power supply (PLL)
DC I/O output buffer supply voltage
I/O input voltage
Storage temperature
Junction temperature
Parameter
2-2.
is not implied.
Table 2-1
may cause permanent damage to the device.
"ProASIC3 nano Ordering Information" section on page III
R e v i s i o n 8
Table 2-4 on page
Table 2-3 on page
2-3.
–0.3 V to 3.6 V
–0.3 to 1.65
–0.3 to 3.75
–0.3 to 3.75
–0.3 to 1.65
–0.3 to 3.75
–65 to +150
2-2, and for recommended operating
Limits
+125
Units
°C
°C
V
V
V
V
V
V
2 -1
for