LPC2420FET208,551 NXP Semiconductors, LPC2420FET208,551 Datasheet - Page 26

• Manufacturer Part Number: LPC2420FET208,551
• Description: IC ARM7 MCU 16BIT T208FBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2420FET208,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: EBI/EMI, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Type: ROMless
• Ram Size: 82K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-TFBGA
• Processor Series: LPC2420
• Core: ARM7
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: SPI, I2C, I2S, USB, SSP
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Processor To Be Evaluated: ARM7TDMI-S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-5216

NXP Semiconductors
LPC2420_60_5
Preliminary data sheet
7.2 On-chip SRAM
7.3 Memory map
The Thumb set’s 16-bit instruction length allows it to approach higher density compared to
standard ARM code while retaining most of the ARM’s performance.
The LPC2420/2460 includes a SRAM memory of 64 kB reserved for the ARM processor
exclusive use. This RAM may be used for code and/or data storage and may be accessed
as 8 bits, 16 bits, and 32 bits.
A 16 kB SRAM block serving as a buffer for the Ethernet controller (LPC2460 only) and a
16 kB SRAM associated with the second AHB can be used both for data and code
storage, too. The 2 kB RTC SRAM can be used for data storage only. The RTC SRAM is
battery powered and retains the content in the absence of the main power supply.
The LPC2420/2460 memory map incorporates several distinct regions as shown in
Table 5
In addition, the CPU interrupt vectors may be remapped to allow them to reside in either
boot ROM or SRAM (see
Table 5.
Address range General use
0x0000 0000 to
0x3FFF FFFF
0x4000 0000 to
0x7FFF FFFF
0x8000 0000 to
0xDFFF FFFF
0xE000 0000 to
0xEFFF FFFF
0xF000 0000 to
0xFFFF FFFF
and
LPC2420/2460 memory usage and details
Figure
on-chip RAM
off-chip memory
APB peripherals
AHB peripherals
fast I/O
4.
Rev. 05 — 24 February 2010
Section
7.25.6).
Address range details and description
0x3FFF C000 to 0x3FFF FFFF
0x4000 0000 to 0x4000 FFFF
0x7FE0 0000 to 0x7FE0 3FFF
0x7FD0 0000 to 0x7FD0 3FFF
Four static memory banks, 16 MB each
0x8000 0000 to 0x80FF FFFF
0x8100 0000 to 0x81FF FFFF
0x8200 0000 to 0x82FF FFFF
0x8300 0000 to 0x83FF FFFF
Four dynamic memory banks, 256 MB each
0xA000 0000 to 0xAFFF FFFF
0xB000 0000 to 0xBFFF FFFF
0xC000 0000 to 0xCFFF FFFF
0xD000 0000 to 0xDFFF FFFF
36 peripheral blocks, 16 kB each
Flashless 16-bit/32-bit microcontroller
LPC2420/2460
fast GPIO registers
RAM (64 kB)
Ethernet RAM (16 kB)
(LPC2460 only)
USB RAM (16 kB)
static memory bank 0
static memory bank 1
static memory bank 2
static memory bank 3
dynamic memory bank 0
dynamic memory bank 1
dynamic memory bank 2
dynamic memory bank 3
© NXP B.V. 2010. All rights reserved.
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