PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 172

• Manufacturer Part Number: PIC18F26K80-I/SO
• Description: MCU PIC 64KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K80-I/SO

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F26K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F66K80 FAMILY
REGISTER 10-18: IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5
DS39977C-page 172
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-1
IRXIP
IRXIP: Invalid Message Received Interrupt Priority bits
1 = High priority
0 = Low priority
WAKIP: Bus Wake Up Activity Interrupt Priority bit
1 = High priority
0 = Low priority
1 = High priority
0 = Low priority
TXB2IP: Transmit Buffer 2 Interrupt Priority bit
1 = High priority
0 = Low priority
TXB1IP: Transmit Buffer 1 Interrupt Priority bit
1 = High priority
0 = Low priority
TXB0IP: Transmit Buffer 0 Interrupt Priority bit
1 = High priority
0 = Low priority
RXB1IP: Receive Buffer 1 Interrupt Priority bit
Mode 0:
1 = High priority for Receive Buffer 1
0 = Low priority for Receive Buffer 1
Modes 1 and 2:
1 = High priority for received messages
0 = Low priority for received messages
RXB0IP/FIFOFIP: Receive Buffer 0 Interrupt Priority bit
Mode 0:
1 = High priority for Receive Buffer 0
0 = Low priority for Receive Buffer 0
Mode 1:
Unimplemented: Read as ‘ 0 ’
Mode 2:
FIFOFIE: FIFO Full Interrupt Flag bit
1 = High priority
0 = Low priority
ERRIP: CAN Bus Error Interrupt Priority bit
WAKIP
R/W-1
W = Writable bit
‘1’ = Bit is set
ERRIP
R/W-1
TXB2IP
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TXB1IP
R/W-1
TXB0IP
R/W-1
 2011 Microchip Technology Inc.
x = Bit is unknown
RXB1IP
R/W-1
RXB0IP/
FIFOFIE
R/W-1
bit 0