PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 182

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PIC18F26K80-I/SO

Manufacturer Part Number
PIC18F26K80-I/SO
Description
MCU PIC 64KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F26K80-I/SO

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (0.300", 7.50mm Width)
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Price
Part Number:
PIC18F26K80-I/SO
Manufacturer:
Microchip Technology
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Manufacturer:
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0
PIC18F66K80 FAMILY
TABLE 11-1:
DS39977C-page 182
RA0/CV
ULPWU
RA1/AN1/C1INC
RA2/V
C2INC
RA3/V
RA5/AN4/C2INB/
HLVDIN/T1CKI/SS/
CTMUI
RA6/OSC2/
CLKOUT
RA7/OSC1/CLKIN
Legend:
Note 1:
Pin Name
REF
REF
2:
REF
-/AN2/
+/AN3
/AN0/
O = Output, I = Input, ANA = Analog Signal, DIG = CMOS Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Pin assignment unavailable for 28-pin devices (PIC18F2XK80).
Pin assignment only available for 28-pin devices (PIC18F2XK80).
PORTA FUNCTIONS
Function
C1INC
C2INC
CTMUI
CLKOUT
C2INB
ULPWU
HLVDIN
CV
CLKIN
V
T1CKI
OSC2
OSC1
V
RA0
AN0
RA1
AN1
RA2
AN2
RA3
AN3
RA5
AN4
RA6
RA7
REF
REF
SS
REF
+
-
(1)
(1)
(2)
(2)
Setting
TRIS
0
1
x
1
1
0
1
1
x
0
1
1
1
x
0
1
1
1
0
1
1
1
1
x
1
x
0
1
x
x
0
1
x
x
I/O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
ST
ST
ST
ST
ST
ST
ST
ST
ST
Preliminary
LATA<0> data output; not affected by analog input.
PORTA<0> data input; disabled when analog input is enabled.
Comparator voltage reference output. Enabling this feature disables
digital I/O.
A/D Input Channel 0. Default input configuration on POR; does not
affect digital output.
Ultra low-power wake-up input.
LATA<1> data output; not affected by analog input.
PORTA<1> data input; disabled when analog input is enabled.
A/D Input Channel 1. Default input configuration on POR; does not
affect digital output.
Comparator 1 Input C.
LATA<2> data output; not affected by analog input.
PORTA<2> data input; disabled when analog functions are enabled.
A/D and comparator low reference voltage input.
A/D Input Channel 2. Default input configuration on POR.
Comparator 2 Input C.
LATA<3> data output; not affected by analog input.
PORTA<3> data input; disabled when analog input is enabled.
A/D Input Channel 3. Default input configuration on POR.
A/D and comparator high reference voltage input.
LATA<5> data output; not affected by analog input.
PORTA<5> data input; disabled when analog input is enabled.
A/D Input Channel 4. Default configuration on POR.
Comparator 2 Input B.
High/Low-Voltage Detect external trip point input.
Timer1 clock input.
Slave select input for MSSP module.
CTMU pulse generator charger for the C2INB comparator input.
LATA<6> data output; disabled when FOSC2 Configuration bit is set.
PORTA<6> data input; disabled when FOSC2 Configuration bit is set.
Main oscillator feedback output connection (HS, XT and LP modes).
System cycle clock output (FOSC/4) (EC and INTOSC modes).
LATA<7> data output; disabled when FOSC2 Configuration bit is set.
PORTA<7> data input; disabled when FOSC2 Configuration bit is set.
Main oscillator input connection (HS, XT, and LP modes).
Main external clock source input (EC modes).
Description
 2011 Microchip Technology Inc.

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