PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 220

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PIC18F26K80-I/SO

Manufacturer Part Number
PIC18F26K80-I/SO
Description
MCU PIC 64KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F26K80-I/SO

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (0.300", 7.50mm Width)
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIC18F66K80 FAMILY
14.4
Timer1 can be configured for 16-bit reads and writes.
When the RD16 control bit (T1CON<1>) is set, the
address for TMR1H is mapped to a buffer register for
the high byte of Timer1. A read from TMR1L loads the
contents of the high byte of Timer1 into the Timer1 High
Byte Buffer register. This provides the user with the
ability to accurately read all 16 bits of Timer1 without
having to determine whether a read of the high byte,
followed by a read of the low byte, has become invalid
due to a rollover between reads.
A write to the high byte of Timer1 must also take place
through the TMR1H Buffer register. The Timer1 high
byte is updated with the contents of TMR1H when a
write occurs to TMR1L. This allows a user to write all
16 bits at once to both the high and low bytes of Timer1.
The high byte of Timer1 is not directly readable or
writable in this mode. All reads and writes must take
place through the Timer1 High Byte Buffer register.
Writes to TMR1H do not clear the Timer1 prescaler.
The prescaler is only cleared on writes to TMR1L.
14.5
An on-chip crystal oscillator circuit is incorporated
between pins, SOSCI (input) and SOSCO (amplifier
output). It can be enabled one of these ways:
• Setting the SOSCEN bit in either the T1CON or
• Setting the SOSCGO bit in the OSCCON2 register
• Setting the SCS bits to secondary clock source in
The SOSCGO bit is used to warm up the SOSC so that
it is ready before any peripheral requests it.
The oscillator is a low-power circuit rated for 32 kHz
crystals. It will continue to run during all power-
managed modes. The circuit for a typical low-power
oscillator is depicted in
provides the capacitor selection for the SOSC
oscillator.
The user must provide a software time delay to ensure
proper start-up of the SOSC oscillator.
DS39977C-page 220
T3CON register (TxCON<3>)
(OSCCON2<3>)
the OSCCON register (OSCCON<1:0> = 01 )
Timer1 16-Bit Read/Write Mode
SOSC Oscillator
Figure
14-2.
Table 14-2
Preliminary
FIGURE 14-2:
TABLE 14-2:
The SOSC crystal oscillator drive level is determined
based on the SOSCSEL (CONFIG1L<4:3>) Configura-
tion
SOSCSEL<1:0> = 11 , is intended to drive a wide
variety of 32.768 kHz crystals with a variety of load
capacitance (CL) ratings.
The Lower Drive Level mode is highly optimized for
extremely low-power consumption. It is not intended to
drive all types of 32.768 kHz crystals. In the Low Drive
Level mode, the crystal oscillator circuit may not work
correctly if excessively large discrete capacitors are
placed on the SOSCO and SOSCI pins. This mode is
designed to work only with discrete capacitances of
approximately 3 pF-10 pF on each pin.
Crystal manufacturers usually specify a CL (load
capacitance) rating for their crystals. This value is
related to, but not necessarily the same as, the values
that should be used for C1 and C2 in
Oscillator
Note:
Note 1: Microchip suggests these values as a starting
Type
LP
bits.
2: Higher capacitance increases the stability of
3: Since each resonator/crystal has its own
4: Capacitor values are for design guidance only.
5: Incorrect capacitance value may result in a fre-
12 pF
12 pF
C1
C2
See the Notes with
information about capacitor selection.
point in validating the oscillator circuit.
the oscillator, but also increases the start-up
time.
characteristics, the user should consult the
resonator/crystal manufacturer for appropriate
values of external components.
Values listed would be typical of a CL = 10 pF
rated crystal, when SOSCSEL = 11.
quency not meeting the crystal manufacturer’s
tolerance specification.
The
32 kHz
Freq.
32.768 kHz
XTAL
CAPACITOR SELECTION FOR
THE TIMER
OSCILLATOR
Higher
EXTERNAL COMPONENTS
FOR THE SOSC
OSCILLATOR
 2011 Microchip Technology Inc.
12 pF
SOSCI
Table 14-2
SOSCO
Drive
C1
PIC18F66K80
(2,3,4,5)
(1)
Figure
Level
for additional
12 pF
14-2.
C2
mode,
(1)

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