PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 293

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PIC18F26K80-I/SO

Manufacturer Part Number
PIC18F26K80-I/SO
Description
MCU PIC 64KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F26K80-I/SO

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (0.300", 7.50mm Width)
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
21.0
21.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be devices such as serial EEPROMs, shift
registers, display drivers and A/D Converters. The
MSSP module can operate in either of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
The I
hardware:
• Master mode
• Multi-Master mode
• Slave mode with 5-bit and 7-bit address masking
21.2
The MSSP module has three associated control regis-
ters. These include a status register (SSPSTAT) and
two control registers (SSPCON1 and SSPCON2). The
use of these registers and their individual configuration
bits differ significantly depending on whether the MSSP
module is operated in SPI or I
Additional details are provided under the individual
sections.
21.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes
communication, typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO
• Serial Data In (SDI) – RC4/SDA/SDI
• Serial Clock (SCK) – RC3/REF0/SCL/SCK
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RA5/AN4/C2INB/
Figure 21-1
module when operating in SPI mode.
 2011 Microchip Technology Inc.
- Full Master mode
- Slave mode (with general address call)
(with address masking for both 10-bit and 7-bit
addressing)
HLVDIN/T1CKI/SS/CTMU1
2
C interface supports the following modes in
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
Control Registers
SPI Mode
of
shows the block diagram of the MSSP
SPI
are
supported.
2
C™)
2
C mode.
To
accomplish
Preliminary
PIC18F66K80 FAMILY
FIGURE 21-1:
Note:
SCK
SDO
SS
SDI
Only port I/O names are used in this diagram for
the sake of brevity. Refer to the text for a full list of
multiplexed functions.
Read
SS Control
Select
SMP:CKE
Edge
bit 0
Select
Edge
MSSP BLOCK DIAGRAM
(SPI MODE)
Enable
TRIS bit
SSPBUF reg
2
Data to TXx/RXx in SSPSR
SSPSR reg
Clock Select
SSPM<3:0>
4
2
DS39977C-page 293
(
Prescaler
4, 16, 64
TMR2 Output
Write
Clock
Shift
Data Bus
Internal
2
T
OSC
)

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