PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 340

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PIC18F26K80-I/SO

Manufacturer Part Number
PIC18F26K80-I/SO
Description
MCU PIC 64KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F26K80-I/SO

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (0.300", 7.50mm Width)
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K80-I/SO
Manufacturer:
Microchip Technology
Quantity:
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Manufacturer:
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Quantity:
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Part Number:
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0
PIC18F66K80 FAMILY
22.1
The operation of each Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTAx)
• Receive Status and Control (RCSTAx)
• Baud Rate Control (BAUDCONx)
These are detailed on the following pages in
Register
respectively.
REGISTER 22-1:
DS39977C-page 340
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-x
CSRC
EUSART Control Registers
22-1,
SREN/CREN overrides TXEN in Sync mode.
CSRC: Clock Source Select bit
Asynchronous mode:
Don’t care.
Synchronous mode:
1 = Master mode (clock generated internally from BRG)
0 = Slave mode (clock from external source)
TX9: 9-Bit Transmit Enable bit
1 = Selects 9-bit transmission
0 = Selects 8-bit transmission
TXEN: Transmit Enable bit
1 = Transmit is enabled
0 = Transmit is disabled
SYNC: EUSART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
SENDB: Send Break Character bit
Asynchronous mode:
1 = Send Sync Break on next transmission (cleared by hardware upon completion)
0 = Sync Break transmission completed
Synchronous mode:
Don’t care.
BRGH: High Baud Rate Select bit
Asynchronous mode:
1 = High speed
0 = Low speed
Synchronous mode:
Unused in this mode.
TRMT: Transmit Shift Register Status bit
1 = TSR is empty
0 = TSR is full
TX9D: 9th bit of Transmit Data
Can be address/data bit or a parity bit.
Register 22-2
R/W-x
TX9
TXSTAx: TRANSMIT STATUS AND CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
TXEN
and
R/W-x
(1)
Register
(1)
R/W-x
SYNC
22-3,
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SENDB
R/W-x
Note:
Throughout this section, references to
register and bit names that may be asso-
ciated with a specific EUSART module are
referred to generically by the use of ‘x’ in
place of the specific module number.
Thus, “RCSTAx” might refer to the
Receive
EUSART1 or EUSART2.
BRGH
R/W-x
Status
 2011 Microchip Technology Inc.
x = Bit is unknown
TRMT
R-x
register
for
R/W-x
TX9D
either
bit 0

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