PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 356

• Manufacturer Part Number: PIC18F26K80-I/SO
• Description: MCU PIC 64KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K80-I/SO

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F26K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F66K80 FAMILY
22.3.5
The EUSART module has the capability of sending the
special Break character sequences that are required by
the LIN/J2602 bus standard. The Break character
transmit consists of a Start bit, followed by twelve ‘ 0 ’
bits and a Stop bit. The Frame Break character is sent
whenever the SENDB and TXEN bits (TXSTAx<3> and
TXSTAx<5>, respectively) are set while the Transmit
Shift Register is loaded with data. Note that the value
of data written to TXREGx will be ignored and all ‘ 0 ’s
will be transmitted.
The SENDB bit is automatically reset by hardware after
the corresponding Stop bit is sent. This allows the user
to preload the transmit FIFO with the next transmit byte
following the Break character (typically, the Sync
character in the LIN/J2602 specification).
Note that the data value written to the TXREGx for the
Break character is ignored. The write simply serves the
purpose of initiating the proper sequence.
The TRMT bit indicates when the transmit operation is
active or Idle, just as it does during normal transmis-
sion. See
character sequence.
22.3.5.1
The following sequence will send a message frame
header made up of a Break, followed by an Auto-Baud
Sync byte. This sequence is typical of a LIN/J2602 bus
master.
FIGURE 22-10:
DS39977C-page 356
Reg. Empty Flag)
Reg. Empty Flag)
Reg. Empty Flag)
Write to TXREGx
(Transmit Buffer
(Transmit Shift
(Transmit Shift
BRG Output
(Shift Clock)
SENDB bit
TRMT bit
TXx (pin)
TXxIF bit
Figure 22-10
BREAK CHARACTER SEQUENCE
Break and Sync Transmit Sequence
SEND BREAK CHARACTER SEQUENCE
Dummy Write
for the timing of the Break
SENDB sampled here
Start Bit
Bit 0
Preliminary
Bit 1
Break
1.
2.
3.
4.
5.
When the TXREGx becomes empty, as indicated by
the TXxIF, the next data byte can be written to
TXREGx.
22.3.6
The Enhanced USART module can receive a Break
character in two ways.
The first method forces configuration of the baud rate
at a frequency of 9/13 the typical speed. This allows for
the Stop bit transition to be at the correct sampling
location (13 bits for Break versus Start bit and 8 data
bits for typical data).
The second method uses the auto-wake-up feature
described in
Break Character”
EUSART will sample the next two transitions on
RXx/DTx, cause an RCxIF interrupt and receive the
next data byte followed by another interrupt.
Note that following a Break character, the user will
typically want to enable the Auto-Baud Rate Detect
feature. For both methods, the user can set the ABDEN
bit once the TXxIF interrupt is observed.
Configure the EUSART for the desired mode.
Set the TXEN and SENDB bits to set up the
Break character.
Load the TXREGx with a dummy character to
initiate transmission (the value is ignored).
Write ‘55h’ to TXREGx to load the Sync
character into the transmit FIFO buffer.
After the Break has been sent, the SENDB bit is
reset by hardware. The Sync character now
transmits in the preconfigured mode.
RECEIVING A BREAK CHARACTER
Section 22.3.4 “Auto-Wake-up on Sync
Bit 11
. By enabling this feature, the
Auto-Cleared
 2011 Microchip Technology Inc.
Stop Bit