PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 427

• Manufacturer Part Number: PIC18F26K80-I/SO
• Description: MCU PIC 64KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K80-I/SO

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F26K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 27-42: RXMnSIDL: RECEIVE ACCEPTANCE MASK ‘n’ STANDARD IDENTIFIER MASK
REGISTER 27-43: RXMnEIDH: RECEIVE ACCEPTANCE MASK ‘n’ EXTENDED IDENTIFIER MASK
REGISTER 27-44: RXMnEIDL: RECEIVE ACCEPTANCE MASK ‘n’ EXTENDED IDENTIFIER MASK
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-x
R/W-x
EID15
R/W-x
SID2
EID7
This bit is available in Mode 1 and 2 only.
SID<2:0>: Standard Identifier Mask bits or Extended Identifier Mask bits (EID<20:18>)
Unimplemented: Read as ‘ 0 ’
Mode 0:
Unimplemented: Read as ‘ 0 ’
Mode 1, 2:
EXIDEN: Extended Identifier Filter Enable Mask bit
1 = Messages selected by the EXIDEN bit in RXFnSIDL will be accepted
0 = Both standard and extended identifier messages will be accepted
Unimplemented: Read as ‘ 0 ’
EID<17:16>: Extended Identifier Mask bits
EID<15:8>: Extended Identifier Mask bits
EID<7:0>: Extended Identifier Mask bits
EID14
R/W-x
R/W-x
R/W-x
SID1
EID6
REGISTERS, LOW BYTE [0  n  1]
REGISTERS, HIGH BYTE [0  n  1]
REGISTERS, LOW BYTE [0  n  1]
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-x
R/W-x
EID13
R/W-x
SID0
EID5
EID12
R/W-x
R/W-x
EID4
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
EXIDEN
R/W-0
R/W-x
EID11
R/W-x
EID3
(1)
(1)
R/W-x
EID10
R/W-x
EID2
U-0
—
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-x
EID17
R/W-x
R/W-x
EID9
EID1
DS39977C-page 427
EID16
R/W-x
R/W-x
R/W-x
EID8
EID0
bit 0
bit 0
bit 0