PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 441

• Manufacturer Part Number: PIC18F26K80-I/SO
• Description: MCU PIC 64KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K80-I/SO

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F26K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 27-59: TXBIE: TRANSMIT BUFFERS INTERRUPT ENABLE REGISTER
REGISTER 27-60: BIE0: BUFFER INTERRUPT ENABLE REGISTER 0
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note 1:
B5IE
R/W-0
U-0
—
2:
2:
(2)
This register is available in Mode 1 and 2 only.
TXBnIE in PIE5 register must be set to get an interrupt.
This register is available in Mode 1 and 2 only.
Either TXBnIE or RXBnIE in the PIE5 register must be set to get an interrupt.
Unimplemented: Read as ‘ 0 ’
TXB2IE:TXB0IE: Transmit Buffer 2-0 Interrupt Enable bits
1 = Transmit buffer interrupt is enabled
0 = Transmit buffer interrupt is disabled
Unimplemented: Read as ‘ 0 ’
B<5:0>IE: Programmable Transmit/Receive Buffer 5-0 Interrupt Enable bits
1 = Interrupt is enabled
0 = Interrupt is disabled
RXB<1:0>IE: Dedicated Receive Buffer 1-0 Interrupt Enable bits
1 = Interrupt is enabled
0 = Interrupt is disabled
B4IE
R/W-0
U-0
—
(2)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
B3IE
R/W-0
U-0
—
(2)
TXB2IE
B2IE
R/W-0
R/W-0
Preliminary
(2)
(2)
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
TXB1IE
B1IE
R/W-0
R/W-0
(2)
(2)
(2)
TXB0IE
B0IE
R/W-0
R/W-0
(2)
(1)
(2)
(2)
x = Bit is unknown
x = Bit is unknown
RXB1IE
(2)
R/W-0
U-0
—
(1)
DS39977C-page 441
(2)
RXB0IE
R/W-0
U-0
—
bit 0
bit 0
(2)