PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 59

• Manufacturer Part Number: PIC18F26K80-I/SO
• Description: MCU PIC 64KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K80-I/SO

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F26K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The use of the flag and control bits in the OSCCON
register is discussed in more detail in
“Power-Managed
3.3.2.1
Since the SCS bits are cleared on all forms of Reset,
this means the primary oscillator defined by the
FOSC<3:0> Configuration bits is used as the primary
clock source on device Resets. This could either be the
internal oscillator block by itself, or one of the other
primary clock sources (HS, EC, XT, LP, External RC
and PLL-enabled modes).
In those cases when the internal oscillator block, with-
out PLL, is the default clock on Reset, the Fast RC
Oscillator (INTOSC) will be used as the device clock
source. It will initially start at 8 MHz; the postscaler
selection that corresponds to the Reset value of the
IRCF<2:0> bits (‘110’).
Regardless of which primary oscillator is selected,
INTOSC will always be enabled on device power-up. It
serves as the clock source until the device has loaded
its configuration values from memory. It is at this point
that the FOSC Configuration bits are read and the
oscillator selection of the operational mode is made.
Note that either the primary clock source or the internal
oscillator will have two bit setting options for the possible
values of the SCS<1:0> bits, at any given time.
3.3.3
PIC18F66K80 family devices contain circuitry to
prevent clock “glitches” when switching between clock
sources. A short pause in the device clock occurs
during the clock switch. The length of this pause is the
sum of two cycles of the old clock source and three to
four cycles of the new clock source. This formula
assumes that the new clock source is stable.
Clock transitions are discussed in greater detail in
Section 4.1.2 “Entering Power-Managed
 2011 Microchip Technology Inc.
Note 1: The Timer1/3/5/7 oscillator must be
2: It is recommended that the Timerx
OSCILLATOR TRANSITIONS
enabled to select the secondary clock
source. The Timerx oscillator is enabled
by setting the SOSCEN bit in the Timerx
Control register (TxCON<3>). If the Tim-
erx oscillator is not enabled, then any
attempt to select a secondary clock
source when executing a SLEEP instruc-
tion will be ignored.
oscillator be operating and stable before
executing the SLEEP instruction or a very
long delay may occur while the Timerx
oscillator starts.
System Clock Selection and Device
Resets
Modes”.
Section 4.0
Modes”.
Preliminary
PIC18F66K80 FAMILY
3.4
For timing-insensitive applications, the RC and RCIO
Oscillator modes offer additional cost savings. The
actual oscillator frequency is a function of several
factors:
• Supply voltage
• Values of the external resistor (R
• Operating temperature
Given the same device, operating voltage and temper-
ature, and component values, there will also be unit to
unit frequency variations. These are due to factors
such as:
• Normal manufacturing variation
• Difference in lead frame capacitance between
• Variations within the tolerance of the limits of
In the RC Oscillator mode, the oscillator frequency,
divided by 4, is available on the OSC2 pin. This signal
may be used for test purposes or to synchronize other
logic.
connected.
FIGURE 3-2:
The RCIO Oscillator mode
the RC mode, except that the OSC2 pin becomes an
additional general purpose I/O pin. The I/O pin
becomes bit 6 of PORTA (RA6).
FIGURE 3-3:
C
V
C
V
Recommended values: 3 k  R
Recommended values: 3 k  R
(C
package types (especially for low C
R
R
R
EXT
SS
EXT
SS
EXT
EXT
EXT
EXT
V
Figure 3-2
V
DD
DD
and C
)
RC Oscillator
RA6
EXT
F
OSC
shows how the R/C combination is
/4
RC OSCILLATOR MODE
OSC1
RCIO OSCILLATOR MODE
OSC1
OSC2/CLKO
I/O (OSC2)
20 pF C
20 pF C
(Figure
EXT
EXT
EXT
EXT
EXT
 100 k
 100 k
 300 pF
 300 pF
3-3) functions like
DS39977C-page 59
PIC18F66K80
PIC18F66K80
EXT
) and capacitor
values)
Internal
Internal
Clock
Clock