STM32F101VGT6 STMicroelectronics, STM32F101VGT6 Datasheet - Page 83

MCU ARM 32BIT 1MB FLASH 100LQFP

STM32F101VGT6

Manufacturer Part Number
STM32F101VGT6
Description
MCU ARM 32BIT 1MB FLASH 100LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F101VGT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Processor Series
STM32F101xG
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
80 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
112
Number Of Timers
15
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 105 C
Processor To Be Evaluated
STM32F101VG
Supply Current (max)
28 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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0
STM32F101xF, STM32F101xG
Output voltage levels
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table
Table 47.
1. The I
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
3. The I
4. Based on characterization data, not tested in production.
Symbol
V
V
V
V
V
V
V
V
OH
OH
OH
OH
OL
OL
OL
OL
and the sum of I
Table 8
(1)
(1)
(1)
(1)
(3)
(3)
(3)
(3)
10. All I/Os are CMOS and TTL compliant.
IO
IO
current sunk by the device must always respect the absolute maximum rating specified in
current sourced by the device must always respect the absolute maximum rating specified in
and the sum of I
Output Low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output High level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output voltage characteristics
IO
(I/O ports and control pins) must not exceed I
IO
Parameter
(I/O ports and control pins) must not exceed I
Doc ID 17143 Rev 2
DD
supply voltage conditions summarized in
2.7 V < V
2.7 V < V
2.7 V < V
2 V < V
I
CMOS port
IO
I
Table 47
IO
I
Conditions
I
IO
TTL port
IO
= +20 mA
= +6 mA
VSS
= +8 mA,
= +8 mA
DD
DD
DD
DD
.
< 2.7 V
< 3.6 V
< 3.6 V
< 3.6 V
(2)
VDD
are derived from tests
(2)
(4)
(4)
,
.
Electrical characteristics
V
V
V
DD
DD
DD
Min
2.4
–0.4
–1.3
–0.4
Max
0.4
0.4
1.3
0.4
Table 8
83/108
Unit
V
V
V
V

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