74LVC2T45GD,125 NXP Semiconductors, 74LVC2T45GD,125 Datasheet - Page 14

TXRX TRANSLATING 3ST XSON8U

74LVC2T45GD,125

Manufacturer Part Number
74LVC2T45GD,125
Description
TXRX TRANSLATING 3ST XSON8U
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC2T45GD,125

Logic Family
74LVC
Number Of Channels Per Chip
2
Propagation Delay Time
15.2 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Package / Case
XSON-8U
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5480-2
NXP Semiconductors
Table 13.
Voltages are referenced to GND (ground = 0 V); for test circuit see
74LVC_LVCH2T45
Product data sheet
Symbol Parameter
t
V
t
t
t
t
t
t
V
t
t
t
t
t
t
V
t
t
t
t
PZL
PLH
PHL
PHZ
PLZ
PZH
PZL
PLH
PHL
PHZ
PLZ
PZH
PZL
PLH
PHL
PHZ
PLZ
CC(A)
CC(A)
CC(A)
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
OFF-state to LOW
propagation delay
LOW to HIGH
propagation delay
HIGH to LOW
propagation delay
HIGH to OFF-state
propagation delay
LOW to OFF-state
propagation delay
OFF-state to HIGH
propagation delay
OFF-state to LOW
propagation delay
LOW to HIGH
propagation delay
HIGH to LOW
propagation delay
HIGH to OFF-state
propagation delay
LOW to OFF-state
propagation delay
OFF-state to HIGH
propagation delay
OFF-state to LOW
propagation delay
LOW to HIGH
propagation delay
HIGH to LOW
propagation delay
HIGH to OFF-state
propagation delay
LOW to OFF-state
propagation delay
Dynamic characteristics for temperature range −40 °C to +125 °C
Conditions
DIR to A
DIR to B
A to B
B to A
A to B
B to A
DIR to A
DIR to B
DIR to A
DIR to B
DIR to A
DIR to B
DIR to A
DIR to B
A to B
B to A
A to B
B to A
DIR to A
DIR to B
DIR to A
DIR to B
DIR to A
DIR to B
DIR to A
DIR to B
A to B
B to A
A to B
B to A
DIR to A
DIR to B
DIR to A
DIR to B
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
All information provided in this document is subject to legal disclaimers.
1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V
Min
2.0
1.8
2.0
1.6
1.8
2.7
1.5
2.0
2.0
1.5
1.9
1.5
2.0
2.6
1.8
2.0
1.9
1.4
2.0
1.5
1.5
2.6
1.2
2.0
-
-
-
-
-
-
-
-
-
-
Rev. 4 — 20 August 2010
Max
43.5
38.0
19.7
14.9
17.4
13.0
24.8
16.1
31.0
26.1
37.8
26.4
18.9
13.0
17.2
12.0
19.8
15.0
28.0
25.1
31.8
25.3
18.3
16.9
19.1
14.5
11.6
11.9
9.0
6.4
8.1
6.2
6.0
4.1
Min
2.0
1.9
1.8
1.7
1.8
2.7
1.5
2.2
1.8
1.5
1.8
1.6
2.0
2.6
1.8
2.1
1.7
1.2
1.6
1.5
1.5
2.6
1.2
2.1
-
-
-
-
-
-
-
-
-
-
74LVC2T45; 74LVCH2T45
Figure
Max
39.9
34.7
17.6
10.3
14.2
23.6
14.6
24.9
24.0
33.0
23.2
17.1
13.9
18.2
13.8
21.8
23.3
26.1
22.0
16.7
13.5
17.8
13.4
9.4
9.0
6.4
8.0
7.9
8.1
6.2
7.5
7.7
6.0
4.1
Dual supply translating transceiver; 3-state
9; for wave forms see
Min
1.3
1.3
1.2
1.2
1.8
2.2
1.5
1.8
1.2
1.1
1.1
1.1
2.0
2.0
1.8
1.7
0.9
0.9
0.9
0.8
1.5
2.0
1.1
1.7
-
-
-
-
-
-
-
-
-
-
V
CC(B)
…continued
Max
26.9
28.3
12.1
19.3
15.8
20.4
17.3
15.5
15.0
17.2
15.8
10.7
11.2
9.4
9.4
8.3
8.3
9.0
6.4
9.9
8.8
6.9
7.7
6.0
8.1
6.2
8.6
8.3
5.3
6.9
5.1
6.0
4.1
8.2
Min
1.1
1.2
1.1
1.1
1.8
2.5
1.5
2.2
0.7
0.6
0.7
0.7
2.0
2.4
1.8
2.0
0.6
0.6
0.6
0.6
1.5
2.4
0.9
2.0
-
-
-
-
-
-
-
-
-
-
Figure 7
Max
25.3
26.8
10.3
18.1
13.3
18.0
15.0
14.1
12.4
15.0
13.6
6.9
8.8
6.0
7.7
9.0
6.4
9.3
6.2
6.2
5.5
5.5
8.1
9.5
6.2
7.9
6.0
4.9
5.0
4.4
6.0
8.8
4.1
7.7
© NXP B.V. 2010. All rights reserved.
and
Min
0.9
0.9
0.8
0.8
1.8
2.0
1.5
1.6
0.6
0.5
0.6
0.6
2.4
1.9
1.8
1.5
0.4
0.4
0.4
0.4
1.5
2.2
0.8
1.6
-
-
-
-
-
-
-
-
-
-
Figure
Max
22.6 ns
26.6 ns
14.7 ns
14.5 ns
14.1 ns
12.0 ns
12.5 ns
11.7 ns
11.4 ns
11.1 ns
5.3
8.3
5.1
6.9
9.0
7.6
6.4
6.4
4.9
6.0
4.4
5.0
8.1
7.0
6.2
5.4
4.3
4.3
3.9
3.9
6.0
6.3
4.1
5.0
8.
14 of 36
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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