74LVC2T45GD,125 NXP Semiconductors, 74LVC2T45GD,125 Datasheet - Page 24

• Manufacturer Part Number: 74LVC2T45GD,125
• Description: TXRX TRANSLATING 3ST XSON8U
• Manufacturer: NXP Semiconductors

Specifications of 74LVC2T45GD,125

• Logic Family: 74LVC
• Number Of Channels Per Chip: 2
• Propagation Delay Time: 15.2 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.2 V
• Maximum Operating Temperature: + 125 C
• Package / Case: XSON-8U
• Maximum Power Dissipation: 250 mW
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-5480-2

NXP Semiconductors
Table 17.
[1]
Table 18.
74LVC_LVCH2T45
Product data sheet
State
1
2
3
4
V
0 V
1.8 V
2.5 V
3.3 V
5.0 V
Fig 17. Bidirectional logic level-shifting application
CC(A)
H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
DIR CTRL
H
H
L
L
Pull-up or pull-down only needed for 74LVC2T45.
Description of bidirectional logic level-shifting application
Typical total supply current (I
DIR CTRL
V
I/O-1
CC1
14.3 Power-up considerations
V
0 V
0
< 1
< 1
< 1
< 1
CC(B)
system-1
Table 17
and then from system-2 to system-1.
The device is designed such that no special power-up sequence is required other than
GND being applied first.
PULL-UP/DOWN
I/O-1
output
Z
Z
input
gives a sequence that will illustrate data transmission from system-1 to system-2
1.8 V
< 1
< 2
< 2
< 2
2
I/O-2
input
Z
Z
output
V
CC1
All information provided in this document is subject to legal disclaimers.
CC(A)
V
CC(A)
GND
+ I
1A
2A
Rev. 4 — 20 August 2010
CC(B)
1
2
3
4
2.5 V
< 1
< 2
< 2
< 2
< 2
Description
system-1 data to system-2
system-2 is getting ready to send data to system-1. I/O-1 and I/O-2
are disabled. The bus-line state depends on bus hold
DIR bit is set LOW. I/O-1 and I/O-2 still are disabled. The bus-line
state depends on bus hold
system-2 data to system-1
74LVCH2T45
)
74LVC2T45
74LVC2T45; 74LVCH2T45
8
7
6
5
3.3 V
< 1
< 2
< 2
< 2
< 2
V
1B
2B
DIR
Dual supply translating transceiver; 3-state
CC(B)
[1]
V
CC2
PULL-UP/DOWN
5.0 V
< 1
2
< 2
< 2
< 2
system-2
DIR CTRL
© NXP B.V. 2010. All rights reserved.
V
I/O-2
CC2
Unit
μA
μA
μA
μA
μA
001aai932
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