JS28F128P30BF75A NUMONYX, JS28F128P30BF75A Datasheet - Page 83

• Manufacturer Part Number: JS28F128P30BF75A
• Description: IC FLASH 128MBIT 65NM 56TSOP
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of JS28F128P30BF75A

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (8Mx16)
• Speed: 75ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 2 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-TFSOP (0.551", 14.00mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

P30
Figure 37: BEFP Flowchart
August 2008
Order Number: 306666-12
Standby
Standby
(Note 1)
State
Write
Write
Write
Read
Bus
Operation
Condition
Register
Confirm
Unlock
Done?
Status
Check
Block
BEFP
Setup
BEFP
BEFP
Setup
Error
NOTES:
1. First-word address to be programmed within the target block must be aligned on a write -buffer boundary.
2. W rite-buffer contents are programmed sequentially to the flash array starting at the first word address (W SM internally increments addressing ).
BEFP Setup
BEFP Setup delay
Setup Phase
1
1
Check V
Block Unlocked
errors (SR[3,1])
st
st
V
Data = 0x80 @ 1
Address
Data = 0x80 @ 1
Address
Data = Status Register Data
Address = 1
Check SR [7]:
0 = BEFP Ready
1 = BEFP Not Ready
If SR[7] is set, check:
SR[3] set = V
SR[1] set = Locked Block
Write D0h @
W rite 80h @
Status Reg .
V
W ord Address
W ord Address
P PH
BEFP Setup
P P
Read
Done?
Start
applied to VPP
Exit
BUFFERED ENHANCED FACTORY PROGRAMMING (BEFP) PROCEDURE
applied
PP
1
No (SR[7]=1)
Comments
, Lock
st
PP
Word Addr.
Error
st
st
Yes (SR[7]=0)
W ord
W ord
Standby
Standby
Standby
Standby
Standby
Standby
(note 2)
No (SR[0]=1)
State
Read
W rite
Read
W rite
Bus
Program & Verify Phase
Verify Phase
Data Stream
N
Exit Prog &
O peration
Increment
Program
Register
Initialize
Register
Ready?
Status
Status
Done?
Count
Buffer
Count
Buffer
Data?
N
Load
Full?
Last
BEFP Program & Verify
Address Not within
Increment Count:
Write Data @ 1
Initialize Count:
Word Address
W rite 0xFFFF,
Current Block
Data Stream
Status Reg .
Status Reg .
Program
X = X+1
Ready?
X = 32?
Done?
Check
Data?
Read
X = 0
Read
Last
Data = Status Register Data
Address = 1
Check SR[0]:
0 = Ready for Data
1 = Not Ready for Data
X = 0
Data = Data to Program
Address = 1
X = X+1
X = 32?
Yes = Read SR [0]
No = Load Next Data W ord
Data = Status Reg. Data
Address = 1
Check SR[0]:
0 = Program Done
1 = Program in Progress
No = Fill buffer again
Yes = Exit
Data = 0xFFFF @ address
not in current block
Yes (SR[0]=0)
Yes (SR[0]=0)
Y
Y
Comments
st
No (SR[0]=1)
st
st
st
W ord Addr.
W ord Addr.
W ord Addr.
No (SR[7]=0)
Standby
Repeat for subsequent blocks ;
After BEFP exit, a full Status Register check can
determine if any program error occurred ;
See full Status Register check procedure in the
W ord Program flowchart.
W rite 0xFF to enter Read Array state .
State
Read
Bus
Operation
Register
Full Status Check
Status
Check
Status
Exit Phase
Exit
Status Reg .
Procedure
Complete
Program
Exited ?
BEFP
Read
BEFP Exit
Yes (SR[7]=1)
Data = Status Register Data
Address = 1
Check SR[7]:
0 = Exit Not Completed
1 = Exit Completed
Com ments
st
W ord Addr.
Datasheet
83