RC28F256P30BFA NUMONYX, RC28F256P30BFA Datasheet - Page 5

• Manufacturer Part Number: RC28F256P30BFA
• Description: IC FLASH 256MBIT 100NS 64EZBGA
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of RC28F256P30BFA

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 256M (16Mx16)
• Speed: 100ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 2 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-EZBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 898885; 898885; RC28F256P30BF 898885

P30-65nm
1.0
1.1
1.2
Datasheet
5
Functional Description
Introduction
This document provides information about the Numonyx
65nm) product and describes its features, operations, and specifications.
The Numonyx
memory devices. P30-65nm device will be offered in 64-Mbit up through 2-Gbit
densities. This document covers specifically 256-Mbit and 512-Mbit (256M/256M)
product information. Benefits include more density in less space, high-speed interface
device, and support for code and data storage. Features include high-performance
synchronous-burst read mode, fast asynchronous access times, low power, flexible
security options, and three industry-standard package choices. The P30-65nm product
family is manufactured using Numonyx 65nm process technology.
Overview
This section provides an overview of the features and capabilities of the P30-65nm.
The P30-65nm family devices provides high performance at low voltage on a 16-bit
data bus. Individually erasable memory blocks are sized for optimum code and data
storage.
Upon initial power up or return from reset, the device defaults to asynchronous page-
mode read. Configuring the Read Configuration Register enables synchronous burst-
mode reads. In synchronous burst mode, output data is synchronized with a user-
supplied clock signal. A WAIT signal provides easy CPU-to-flash memory
synchronization.
In addition to the enhanced architecture and interface, the device incorporates
technology that enables fast factory program and erase operations. Designed for low-
voltage systems, the P30-65nm supports read operations with V
and program operations with V
Programming (BEFP) provides the fastest flash array programming performance with
V
tied together for a simple, ultra low power design. In addition to voltage flexibility, a
dedicated VPP connection provides complete data protection when V
A Command User Interface (CUI) is the interface between the system processor and all
internal operations of the device. An internal Write State Machine (WSM) automatically
executes the algorithms and timings necessary for block erase and program. A Status
Register indicates erase or program completion and any errors that may have occurred.
An industry-standard command sequence invokes program and erase automation. Each
erase operation erases one block. The Erase Suspend feature allows system software to
pause an erase cycle to read or program data in another block. Program Suspend
allows system software to pause programming to read other locations. Data is
programmed in word increments (16 bits).
The P30-65nm protection register allows unique flash device identification that can be
used to increase system security. The individual Block Lock34
feature provides zero-latency block locking and unlocking. The P30-65nm device
includes enhanced protection via Password Access; this new feature allows write and/or
read access protection of user-defined blocks. In addition, the P30-65nm device also
provides the One-Time Programmable (OTP) security feature backward compatible to
the P30-130nm device.
PP
at 9.0 V, which increases factory throughput. With V
®
Axcell™ Flash Memory (P30-65nm) is the latest generation of flash
PP
at 1.8 V or 9.0 V. Buffered Enhanced Factory
PP
®
at 1.8 V, VCC and VPP can be
Axcell™ Flash Memory (P30-
CC
Order Number: 320002-10
at 1.8 V, and erase
PP
≤ V
PPLK
.
Mar 2010