TEA1753LT/N1,518 NXP Semiconductors, TEA1753LT/N1,518 Datasheet
TEA1753LT/N1,518
Specifications of TEA1753LT/N1,518
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TEA1753LT/N1,518 Summary of contents
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TEA1753LT GreenChip III SMPS control IC Rev. 2 — 8 April 2011 1. General description The GreenChip III is the third generation of green Switched Mode Power Supply (SMPS) controller ICs. The TEA1753LT combines a controller for Power Factor Correction ...
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... NXP Semiconductors 2. Features and benefits 2.1 Distinctive features Integrated PFC and flyback controller Universal mains supply operation ( 276 V AC) Dual boost PFC with accurate maximum output voltage (NXP patented) High level of integration, resulting in a very low external component count and a cost-effective design Adjustable PFC switch-off delay 2 ...
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... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Package Name TEA1753LT SO16 TEA1753LT Product data sheet Description plastic small outline package; 16 leads; body width 3.9 mm All information provided in this document is subject to legal disclaimers. Rev. 2 — 8 April 2011 TEA1753LT GreenChip III SMPS control IC ...
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... NXP Semiconductors 5. Block diagram 3.5 V power down low Vin VINSENSE 7 boost latch reset PFCCOMP 6 clamp VOSENSE 9 2.50 V boost 8 µA 2.5 V 3.5 V boost low Vin V OVP o V start flyback o V short o OCP BLANK 500 mV PFCSENSE 11 60 µA SOFT START SOFT STOP TIMER 4 µs ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. 6.2 Pin description Table 2. Symbol V CC GND FBCTRL FBAUX LATCH PFCCOMP VINSENSE PFCAUX VOSENSE FBSENSE PFCSENSE PFCDRIVER FBDRIVER PFCTIMER HVS HV TEA1753LT Product data sheet GND FBCTRL 3 4 FBAUX LATCH 5 PFCCOMP 6 VINSENSE 7 PFCAUX 8 Pin configuration: TEA1753LT (SOT109-1) ...
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... NXP Semiconductors 7. Functional description 7.1 General control The TEA1753LT contains a controller for a power factor correction circuit as well as a controller for a flyback circuit. A typical configuration is shown in Fig 3. 7.1.1 Start-up and UnderVoltage LockOut (UVLO) Initially the capacitor on the V As long pin is shorted to ground. For a short start-up time the charge current above V ...
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... NXP Semiconductors As soon as the flyback converter is started, the voltage on the FBCTRL pin is monitored. If the output voltage of the flyback converter does not reach its intended regulation level within a predefined time, the voltage on the FBCTRL pin reaches the V error is assumed and a latched protection is initiated. ...
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... NXP Semiconductors VINSENSE PFCCOMP PROTECTION PFCSENSE PFCDRIVER FBSENSE FBDRIVER VOSENSE Fig 4. 7.1.2 Power down For very low standby power applications the power-down mode can be activated by pulling the VINSENSE pin below the V the safe restart protection will be activated. Because the high voltage start-up current source is also disabled during power-down, the TEA1753LT will not restart until the VINSENSE pin voltage is raised again ...
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... NXP Semiconductors 7.1.3 Supply management All internal reference voltages are derived from a temperature compensated and trimmed on-chip band gap circuit. Internal reference currents are derived from a temperature compensated and trimmed on-chip current reference circuit. 7.1.4 Latch input Pin LATCH is a general purpose input pin, which is used to switch off both converters. The pin sources a current I as the voltage on this pin drops below 1 ...
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... NXP Semiconductors 7.2.2 Valley switching and demagnetization (PFCAUX pin) The PFC MOSFET is switched on after the transformer is demagnetized. Internal circuitry connected to the PFCAUX pin detects the end of the secondary stroke. It also detects the voltage across the PFC MOSFET. The next stroke is started if the voltage across the PFC MOSFET is at its minimum in order to reduce switching losses and ElectroMagnetic Interference (EMI) (valley switching) ...
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... NXP Semiconductors The charging current I 0 the voltage on pin PFCSENSE exceeds 0.5 V, the soft start current source starts limiting current I source is switched off; see Fig 5. 7.2.6 Low power mode When the output power of the flyback converter (see converter switches over to frequency reduction mode. When the maximum switching frequency of the flyback drops below 48 kHz, the power factor correction circuit is switched off to maintain high efficiency ...
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... NXP Semiconductors Fig 6. PFC start/stop via PPFCTIMER pin 7.2.8 Dual-boost PFC The PFC output voltage is modulated by the mains input voltage. The mains input voltage is measured via the VINSENSE pin. The current is sourced from the VOSENSE pin if the voltage on the VINSENSE pin drops below 2 ensure the stable switch-over, a 200 mV transition region is inserted around the 2.2 V, see For low VINSENSE input voltages, the output current is 8 μ ...
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... NXP Semiconductors 7.2.11 Overvoltage protection (VOSENSE pin) To prevent output overvoltage during load steps and mains transients an overvoltage protection circuit is built in. As soon as the voltage on the VOSENSE pin exceeds the V of the power factor correction circuit is inhibited. Switching of the PFC recommences as soon as the VOSENSE pin voltage drops below the V When the resistor between pin VOSENSE and ground is open, the overvoltage protection is also triggered ...
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... NXP Semiconductors At high output power the converter switches to quasi-resonant mode. The next converter stroke is started after demagnetization of the transformer current. In quasi-resonant mode switching losses are minimized as the converter only switches on when the voltage across the external MOSFET is at its minimum (valley switching, see also ...
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... NXP Semiconductors As soon as the internal oscillator voltage is high again and the secondary stroke has ended, the circuit waits for the lowest drain voltage before starting a new primary stroke. Figure 10 oscillator signal. Valley switching allows high frequency operation as capacitive switching losses are reduced, see magnetics possible ...
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... NXP Semiconductors Fig 11. Peak current control of flyback part The driver output is latched in the logic, preventing multiple switch-on. 7.3.4 Demagnetization (FBAUX pin) The system is always in quasi-resonant or discontinuous conduction mode. The internal oscillator does not start a new primary stroke until the previous secondary stroke has ended ...
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... NXP Semiconductors Fig 12. Time-out protection circuit Fig 13. Latched time-out protection (signals) in the TEA1753LT 7.3.6 Soft start-up (FBSENSE pin) To prevent audible transformer noise during start-up, the transformer peak current is slowly increased by the soft start function. This can be achieved by inserting a resistor and a capacitor between pin 10 (FBSENSE) and the current sense resistor. ...
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... NXP Semiconductors The charging current I approximately 0. the voltage on pin FBSENSE exceeds 0.63 V, the soft start current source starts limiting the current. After the flyback converter has started, the soft start current source is switched off. Fig 14. Soft start-up of flyback. 7.3.7 Maximum on-time The flyback controller limits the on-time of the external MOSFET to 40 μ ...
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... NXP Semiconductors 7.3.9 Overcurrent protection (FBSENSE pin) The primary peak current in the transformer is measured accurately cycle-by-cycle using the external sense resistor R an internal level (see also leading edge blanking period, t Fig 15. OCP leading edge blanking 7.3.10 Overpower protection During the primary stroke of the flyback converter the input voltage of the flyback converter is measured by sensing the current that is drawn from the pin FBAUX ...
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... NXP Semiconductors 8. Limiting values Table 3. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Voltages LATCH V FBCTRL V PFCCOMP V VINSENSE V VOSENSE V PFCAUX V FBSENSE V PFCSENSE V PFCTIMER V HV Currents I FBCTRL I FBAUX I PFCSENSE I FBSENSE I FBDRIVER I PFCDRIVER I HV General P tot T stg T j ESD V ESD [1] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ ...
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... NXP Semiconductors 9. Thermal characteristics Table 4. Thermal characteristics Symbol Parameter R thermal resistance from th(j-a) junction to ambient R thermal resistance from th(j-c) junction to case 10. Characteristics Table 5. Characteristics ° all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. ...
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... NXP Semiconductors Table 5. Characteristics …continued ° all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. Symbol Parameter V dual boost voltage bst(dual) V power-down threshold voltage th(pd) V power-down hysteresis voltage hys(pd) Loop compensation PFC (pin PFCCOMP) ...
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... NXP Semiconductors Table 5. Characteristics …continued ° all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. Symbol Parameter Soft start PFC (pin PFCSENSE) I PFC soft start current start(soft)PFC V PFC soft start voltage ...
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... NXP Semiconductors Table 5. Characteristics …continued ° all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. Symbol Parameter Demagnetization management flyback (pin FBAUX) V comparator threshold voltage th(comp)FBAUX on pin FBAUX I protection current on pin ...
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... NXP Semiconductors Table 5. Characteristics …continued ° all voltages are measured with respect to ground (pin 2); currents are positive when flowing into amb CC the IC; unless otherwise specified. Symbol Parameter Overcurrent protection flyback (pin FBSENSE) V maximum flyback sense sense(fb)max voltage minimum flyback sense voltage ΔV/Δ mV/μs ...
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... NXP Semiconductors 11. Application information A power supply with the TEA1753LT consists of a power factor correction circuit followed by a flyback converter. See Capacitor C rectified mains during start-up and via the auxiliary winding of the flyback converter during operation. Sense resistors R MOSFETs S1 and S2 into a voltage at pins PFCSENSE and FBSENSE. The values of ...
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... NXP Semiconductors 12. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors 13. Revision history Table 6. Revision history Document ID Release date TEA1753LT v.2 20110408 TEA1753LT v.1 20110304 TEA1753LT Product data sheet Data sheet status Product data sheet Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 8 April 2011 ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... For sales office addresses, please send an email to: TEA1753LT Product data sheet own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 2 2.1 Distinctive features . . . . . . . . . . . . . . . . . . . . . . 2 2.2 Green features . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.3 PFC green features . . . . . . . . . . . . . . . . . . . . . 2 2.4 Flyback green features . . . . . . . . . . . . . . . . . . . 2 2.5 Protection features . . . . . . . . . . . . . . . . . . . . . . 2 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Functional description ...