CP2112EK Silicon Laboratories Inc, CP2112EK Datasheet - Page 17

KIT EVAL FOR CP2112

CP2112EK

Manufacturer Part Number
CP2112EK
Description
KIT EVAL FOR CP2112
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2112EK

Main Purpose
Interface, USB 2.0 to SMBus Bridge
Embedded
No
Utilized Ic / Part
CP2112
Primary Attributes
Full Speed (12Mbps)
Secondary Attributes
LED Status Indicators
Interface Type
USB
Operating Supply Voltage
3.3 V
Product
Interface Development Tools
For Use With/related Products
CP2112
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-2010

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CP2112EK
Manufacturer:
Silicon Labs
Quantity:
135
Alternatively, if 3.0 to 3.6 V power is supplied to the V
device with the voltage regulator bypassed. For this configuration, tie the REGIN input to V
regulator. A typical connection diagram showing the device in a self-powered application with the regulator
bypassed is shown in Figure 9.
The USB max power and power attributes descriptor must match the device power usage and configuration. See
application note “AN144: CP21xx Device Customization Guide” for information on how to customize USB
descriptors for the CP2112.
Connector
Notes:
USB
VBUS
Power
GND
3.3 V
Figure 9. Typical Self-Powered Connection Diagram (Regulator Bypass)
D+
1. Avalanche transient voltage suppression diodes compatible with Full-speed USB should be
2. An external pull-up is not required, but can be added for noise immunity.
3. VIO can be connected directly to VDD or to a supply as low as 1.8 V to set the I/O interface voltage.
4. If programming the configuration ROM via USB, add a 4.7 F capacitor between VPP
D-
added at the connector for ESD protection. Use Littelfuse p/n SP0503BAHT or equivalent.
and ground. During a programming operation, do not connect the VPP pin to other
circuitry, and ensure that VDD is at least 3.3 V.
1-5 F
Note 1
Note 3
0.1 F
VIO
VDD
REGIN
GND
VBUS
D+
D-
Rev. 1.0
DD
CP2112
pin, the CP2112 can function as a USB self-powered
GPIO.1_RXT
GPIO.7_CLK
GPIO.0_TXT
SUSPEND
SUSPEND
GPIO.2
GPIO.3
GPIO.4
GPIO.5
GPIO.6
SDA
RST
VPP
SCL
VIO
Suspend
Devices
Signals
SMBus
Signals
4.7 F
Note 2
Note 4
Slave
GPIO
4.7 k
To
DD
to bypass the voltage
CP2112
17

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