EVB-LAN7500-LC SMSC, EVB-LAN7500-LC Datasheet - Page 51

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EVB-LAN7500-LC

Manufacturer Part Number
EVB-LAN7500-LC
Description
EVALUATION BOARD FOR LAN7500
Manufacturer
SMSC
Datasheets

Specifications of EVB-LAN7500-LC

Design Resources
EVB-LAN7500-LC BOM EVB-LAN7500-LC Gerber Files EVB-LAN7500-LC Schematic
Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
No
Utilized Ic / Part
LAN7500
Primary Attributes
USB 2.0 to 10/100/1000 Ethernet Controller
Secondary Attributes
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1105
EVB-LAN7500
Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
Datasheet
SMSC LAN7500/LAN7500i
7.5.5
SYMBOL
t
t
EEDI (VERIFY)
ckhinvld
t
t
t
t
cshckh
t
t
t
t
dhckh
dvckh
dsckh
ckldis
cshdv
cklcsl
dhcsl
ckcyc
t
t
t
ckh
ckl
csl
EECLK
EEPROM Timing
The following specifies the EEPROM timing requirements for the device:
EEDO
EECS
EEDI
EECLK Cycle time
EECLK High time
EECLK Low time
EECS high before rising edge of EECLK
EECLK falling edge to EECS low
EEDO valid before rising edge of EECLK
EEDO invalid after rising edge EECLK
EEDI setup to rising edge of EECLK
EEDI hold after rising edge of EECLK
EECLK low to data disable (OUTPUT)
EEDIO valid after EECS high (VERIFY)
EEDIO hold after EECS low (VERIFY)
EECS low
DESCRIPTION
t
cshckh
Table 7.18 EEPROM Timing Values
t
cshdv
Figure 7.5 EEPROM Timing
t
ckh
t
t
dsckh
ckcyc
DATASHEET
t
dvckh
t
ckl
51
t
ckhinvld
t
dhckh
1070
1070
1110
MIN
550
550
550
550
580
30
90
0
0
t
ckldis
TYP
t
cklcs
l
t
dhcsl
t
csl
Revision 1.0 (11-01-10)
MAX
1130
570
570
600
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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