LIS3LV02DQ STMicroelectronics, LIS3LV02DQ Datasheet
LIS3LV02DQ
Specifications of LIS3LV02DQ
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LIS3LV02DQ Summary of contents
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... The LIS3LV02DQ is available in plastic SMD package and it is specified over a temperature range extending from -40°C to +85°C. The LIS3LV02DQ belongs to a family of products suitable for a variety of applications: ■ Free-Fall detection ■ Motion activated functions in portable terminals ■ ...
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... Application Hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 Soldering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 Digital Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1 I2C Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1.1 I2C Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2 SPI Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2.1 SPI Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.2.2 SPI Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.2.3 SPI Read in 3-wires mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.1 WHO_AM_I (0Fh 2/42 CD00047926 LIS3LV02DQ ...
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... LIS3LV02DQ 7.2 OFFSET_X (16h 7.3 OFFSET_Y (17h 7.4 OFFSET_Z (18h 7.5 GAIN_X (19h 7.6 GAIN_Y (1Ah 7.7 GAIN_Z (1Bh 7.8 CTRL_REG1 (20h 7.9 CTRL_REG2 (21h 7.10 CTRL_REG3 (22h 7.11 HP_FILTER_RESET (23h 7.12 STATUS_REG (27h 7.13 OUTX_L (28h 7.14 OUTX_H (29h 7.15 OUTY_L (2Ah) ...
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... Mechanical Characteristics derived from measurement in the -40°C to +85°C temperature range 8.3 Electro-Mechanical characteristics at 25° Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 4/42 CD00047926 LIS3LV02DQ 38 ...
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... TRIMMING CIRCUITS NC Y GND VDD Reserved X GND RDY/INT NC CD00047926 1 Block Diagram & Pin Description Reconstruction Filter Regs Reconstruction Array Filter SPI Reconstruction Filter CONTROL LOGIC CLOCK & INTERRUPT GEN Reserved VDD LIS3LV02DQ Reserved (TOP VIEW) GND SCL/SPC SDA/SDO/SDI SDO RDY/INT 5/42 ...
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... SPI enable C/SPI mode selection ( Internally not connected Optional External clock, if not used either leave unconnected or CK connect to GND GND 0V supply Either leave unconnected or connect to Vdd_IO Vdd Power supply Connect to Vdd NC Internally not connected CD00047926 LIS3LV02DQ Function 2 C mode; 0: SPI enabled) ...
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... LIS3LV02DQ 2 Mechanical and Electrical specifications 2.1 Mechanical characteristics Table 2. Mechanical Characteristics (All the parameters are specified @ Vdd=2.5V, T=25°C unless otherwise noted) Symbol Parameter FS Measurement range Dres Device Resolution So Sensitivity Sensitivity Change Vs TCS0 Temperature Zero-g Level Offset Off 4,5 Accuracy Zero-g Level Offset Long ...
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... Best fit straight line Z axis Full-scale = 2g BW=40Hz Full-scale=2g X axis Full-scale=2g Y axis Full-scale=2g Z axis 7,8 Full-scale=6g X axis Full-scale=6g Y axis Full-scale=6g Z axis -OUTPUT[LSb] (Self-test bit on ctrl_reg1=0) CD00047926 LIS3LV02DQ 2 Min. Max. Unit Typ. ±2 %FS ±3 %FS -3.5 3.5 % 100 240 400 LSb 100 240 400 ...
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... LIS3LV02DQ Table 3. Mechanical Characteristics (All the parameters are specified @ Vdd=3.3V, T=25°C unless otherwise noted) Symbol Parameter FS Measurement range Dres Device Resolution So Sensitivity Sensitivity Change Vs TCS0 Temperature Zero-g Level Offset Off 4,5 Accuracy Zero-g Level Offset Long LTOff 6 Term Accuracy Zero-g Level Change Vs ...
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... ODR is output data rate. Refer to table 4 for specifications 10/42 Test conditions Full-scale=2g X axis Full-scale=2g Y axis Full-scale=2g Z axis 7,8 Full-scale=6g X axis Full-scale=6g Y axis Full-scale=6g Z axis -OUTPUT[LSb] (Self-test bit on ctrl_reg1=0) CD00047926 LIS3LV02DQ 2 Min. Max. Unit Typ. 250 550 900 LSb 250 550 900 LSb 100 350 600 LSb 80 ...
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... LIS3LV02DQ 2.2 Electrical characteristics Table 4. Electrical Characteristics (All the parameters are specified @ Vdd=2.5V, T=25°C unless otherwise noted) Symbol Parameter Vdd Supply voltage Vdd_IO I/O pads Supply voltage Idd Supply current Digital High level Input VIH voltage Digital Low level Input ...
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... Note: 1 Supply voltage on any pin should never exceed 6.0V. This is a Mechanical Shock sensitive device, improper handling can cause permanent damages to the part This is an ESD sensitive device, improper handling can cause permanent damages to the part 12/42 Ratings CD00047926 LIS3LV02DQ Maximum Value Unit -0 -0.3 to Vdd +0.1 V -0.3 to Vdd_IO +0.3 V 3000g for 0 ...
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... LIS3LV02DQ 2.4 Terminology 2.4.1 Sensitivity Sensitivity describes the gain of the sensor and can be determined e.g. by applying 1g acceleration to it. As the sensor can measure DC accelerations this can be done easily by pointing the axis of interest towards the center of the earth, noting the output value, rotating the sensor by 180 degrees (point to the sky) and noting the output value again. By doing so, ± ...
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... Factor (DF) and spans from 2560 Hz. The acceleration data may be accessed through an I particularly suitable for direct interfacing with a microcontroller. The LIS3LV02DQ features a Data-Ready signal (RDY) which indicates when a new set of measured acceleration data is available thus simplifying data synchronization in digital system employing the device itself. ...
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... LIS3LV02DQ 3.3 Factory calibration The IC interface is factory calibrated for sensitivity (So) and Zero-g level (Off). The trimming values are stored inside the device by a non volatile structure. Any time the device is turned on, the trimming parameters are downloaded into the registers to be employed during the normal operation ...
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... Application Hints 4 Application Hints Figure 3. LIS3LV02DQ Electrical Connection 10uF 100nF Vdd GND The device core is supplied through Vdd line while the I/O pads are supplied through Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 µF Al) should be placed as near as possible to the pin 3 of the device (common design practice). ...
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... DAta line (SDA). The latter is a bidirectional line used for sending and receiving the data to/from the interface. Both the lines are connected to Vdd_IO through a pull-up resistor embedded inside the LIS3LV02DQ. When the bus is free both the lines are high. 2 The I C interface is compliant with Fast Mode (400 kHz) I Mode ...
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... The I C embedded inside the LIS3LV02DQ behaves like a slave device and the following protocol must be adhered to. After the start condition (ST) a salve address is sent, once a slave acknowledge (SAK) has been returned, a 8-bit sub-address will be transmitted: the 7 LSb represent the actual register address while the MSB enables address auto increment ...
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... In the presented communication format MAK is Master Acknowledge and NMAK is No Master Acknowledge. 5.2 SPI Bus Interface The LIS3LV02DQ SPI is a bus slave. The SPI allows to write and read the registers of the device. The Serial Interface interacts with the outside world with 4 wires: CS, SPC, SDI and SDO. Figure 4. ...
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... SDI RW MS AD5 AD4 AD3 AD2 AD1 AD0 SDO 20/ AD5 AD4 AD3 AD2 AD1 AD0 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 CD00047926 LIS3LV02DQ DO15 DO14 DO13 DO12 DO11 DO10 DO9 DO8 ...
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... LIS3LV02DQ 5.2.2 SPI Write Figure 7. SPI Write protocol CS SPC SDI The SPI Write command is performed with 16 clock pulses. Multiple byte write command is performed adding blocks of 8 clock pulses at the previous one. bit 0 : WRITE bit. The value is 0. bit bit. When 0 do not increment address, when 1 increment address in multiple writing. ...
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... MS bit. When 0 do not increment address, when 1 increment address in multiple reading. bit 2-7 : address AD(5:0). This is the address field of the indexed register. bit 8-15 : data DO(7:0) (read mode). This is the data that will be read from the device (MSb first). Multiple read command is also available in 3-wires mode. 22/42 CD00047926 LIS3LV02DQ ...
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... LIS3LV02DQ 6 Register mapping The table given below provides a listing of the 8 bit registers embedded in the device and the related address. Table 8. Registers address map Reg. Name WHO_AM_I OFFSET_X OFFSET_Y OFFSET_Z GAIN_X GAIN_Y GAIN_Z CTRL_REG1 CTRL_REG2 CTRL_REG3 HP_FILTER RESET STATUS_REG OUTX_L OUTX_H OUTY_L ...
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... CD00047926 LIS3LV02DQ Default Comment Hex 00000000 00000000 Not Used 00000000 00000000 dummy Dummy register Not Used 00000000 00000000 00000000 00000000 Reserved ...
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... WHO_AM_I (0Fh) W7, W0 LIS3LV02DQ Physical Address equal to 3Ah Addressing this register the physical address of the device is returned. For LIS3LV02DQ the physical address assigned in factory is 3Ah. 7.2 OFFSET_X (16h) OX7, OX0 Digital Offset Trimming for X-Axis 7 ...
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... DF0 to “01”, “10” and “11” the selected data-rate will be set respectively equal to 160Hz, 640Hz and to 2560Hz. 26/42 GX7 GX6 GX5 GX4 GX3 GY7 GY6 GY5 GY4 GY3 GZ7 GZ6 GZ5 GZ4 GZ3 PD1 PD0 DF1 DF0 ST CD00047926 LIS3LV02DQ GX2 GX1 GX0 GY2 GY1 GY0 GZ2 GZ1 GZ0 Zen Yen Xen ...
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... LIS3LV02DQ ST bit is used to activate the self test function. When the bit is set to one, an output change will occur to the device outputs (refer to table 2 and 3 for specification) thus allowing to check the functionality of the whole measurement chain. Zen bit enables the Z-axis measurement channel when set to 1. The default value is 1. ...
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... FDS bit enables (FDS=1) or bypass (FDS=0) the high pass filter in the signal chain of the sensor CFS1, CFS0 bits defines the coefficient Hpc to be used to calculate the -3dB cut-off frequency of the high pass filter: 28/42 HPDD HPFF FDS res 0.318 -------------- - ODRx ⋅ ---------------- - toff Hpc CD00047926 LIS3LV02DQ res CFS1 CFS0 2 ...
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... LIS3LV02DQ 7.11 HP_FILTER_RESET (23h) Dummy register. Reading at this address zeroes instantaneously the content of the internal high pass-filter. Read data is not significant. 7.12 STATUS_REG (27h) ZYXOR X, Y and Z axis Data Overrun ZOR Z axis Data Overrun YOR Y axis Data Overrun XOR X axis Data Overrun ...
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... In Big Endian Mode (bit BLE CTRL_REG2 set to ‘1’) the content of this register is the LSB acceleration data 30/42 YD7 YD6 YD5 YD4 YD3 YD15 YD14 YD13 YD12 YD11 YD10 ZD7 ZD6 ZD5 ZD4 ZD3 ZD15 ZD14 ZD13 ZD12 ZD11 ZD10 CD00047926 LIS3LV02DQ YD2 YD1 YD0 YD9 YD8 ZD2 ZD1 ZD0 ZD9 ZD8 ...
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... LIS3LV02DQ 7.19 FF_WU_CFG (30h) And/Or combination of Interrupt events interrupt request. Default value: 0. AOI (0: OR combination of interrupt events; 1: AND combination of interrupt events) Latch interrupt request. Default value: 0. LIR (0: interrupt request not latched; 1: interrupt request latched) Enable Interrupt request on Z high event. Default value: 0. ...
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... Y Low. Default value (0: no interrupt event has occurred) X High. Default value (0: no interrupt event has occurred) X Low. Default value (0: no interrupt event has occurred) 7.21 FF_WU_ACK (32h) Dummy register. If LIR bit in FF_WU_CFG=1 allows the refresh of FF_WU_SRC. Read data is not significant. 32/ CD00047926 LIS3LV02DQ ...
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... LIS3LV02DQ 7.22 FF_WU_THS_L (34h) THS7 THS6 THS5 THS4 THS3 THS2 THS1 THS0 THS7, THS0 Free-fall / Inertial Wake Up Acceleration Threshold LSB 7.23 FF_WU_THS_H (35h) THS15 THS14 THS13 THS12 THS11 THS10 THS9 THS15, THS8 Free-fall / Inertial Wake Up Acceleration Threshold MSB 7.24 FF_WU_DURATION (36h) ...
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... Enable interrupt generation on X low event. Default value: 0 XLIE (0: disable interrupt request; 1: enable interrupt request on measured accel. value lower than preset threshold) Direction-detector configuration register 34/42 LIR ZHIE ZLIE YHIE CD00047926 LIS3LV02DQ YLIE XHIE XLIE ...
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... LIS3LV02DQ 7.26 DD_SRC (39h) X Interrupt event from direction change. IA (0: no direction changes detected; 1: direction has changed from previous measurement) Z High. Default value (0: Z below THSI threshold accel. exceeding THSE threshold along positive direction of acceleration axis) Z Low. Default value (0: Z below THSI threshold; ...
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... THSE15 THSE14 THSE13 THSE12 THSE11 THSE10 THSE9 THSE15, THSE8 36/42 THSI6 THSI5 THSI4 THSI3 THSI12 THSI11 THSI10 THSE6 THSE5 THSE4 THSE3 Direction detection External Threshold LSB Direction detection External Threshold MSB CD00047926 LIS3LV02DQ THSI2 THSI1 THSI0 THSI9 THSI8 THSE2 THSE1 THSE0 THSE8 ...
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... LIS3LV02DQ 8 Typical performance characteristics 8.1 Mechanical Characteristics at 25°C Figure 10. x-axis 0-g level at 2. −10 −5 0 0−g LEVEL (mg) Figure 12. z-axis 0-g level at 2. −20 −15 −10 −5 0 0−g LEVEL (mg) Figure 14. y-axis sensitivity at 2. 1010 1015 1020 1025 sensitivity (LSb/g) Figure 11 ...
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... Figure 17. y-axis 0-g level change vs. 0.5 ο C) Figure 19. x-axis sensitivity change vs. 0.5 1 −0.035 −0.034 −0.033 −0.032 −0.031 −0.03 −0.029 −0.028 −0.027 ο C) Figure 21. z-axis sensitivity change vs. 0.009 0.010 ο C) CD00047926 LIS3LV02DQ temperature at 2. −0.05 0 0.05 0.1 0.15 0.2 0.25 0.3 ο ...
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... LIS3LV02DQ 8.3 Electro-Mechanical characteristics at 25°C Figure 22. x and y axis 0-g level as function of supply voltage −20 −40 −60 −80 2 2.2 2.4 2.6 2.8 3 Supply Voltage (V) Figure 24. Current consumption in Power- Down mode (Vdd=2.5V −5 0 current consumption (uA) Figure 23. z axis 0-g level as function of supply ...
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... QFPN-28 (7x7x1.8mm) 0.10 0.004 Quad Flat Package No lead 0.08 0.003 CD00047926 LIS3LV02DQ ® packages. OUTLINE AND 7787120 C ...
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... LIS3LV02DQ 10 Revision history Date Revision 7-Oct-2005 1 Initial release. CD00047926 10 Revision history Changes 41/42 ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 42/42 All other names are the property of their respective owners © 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com CD00047926 LIS3LV02DQ ...