BU3076HFV-TR Rohm Semiconductor, BU3076HFV-TR Datasheet - Page 4

CLOCK GENERATOR, DIGITAL CAM, HVSOF6

BU3076HFV-TR

Manufacturer Part Number
BU3076HFV-TR
Description
CLOCK GENERATOR, DIGITAL CAM, HVSOF6
Manufacturer
Rohm Semiconductor
Series
-r
Type
Clock Generatorr
Datasheet

Specifications of BU3076HFV-TR

Clock External Input
Yes
Supply Voltage Range
2.85V To 3.6V
Digital Ic Case Style
HVSOF
No. Of Pins
6
Operating Temperature Range
-5°C To +75°C
Svhc
No SVHC (18-Jun-2010)
Package /
RoHS Compliant
Base Number
3076
Rohs Compliant
Yes
Input
Clock
Output
Clock
Frequency - Max
67.5MHz
Voltage - Supply
2.85 V ~ 3.6 V
Operating Temperature
-5°C ~ 75°C
Mounting Type
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BU3076HFV-TR
Manufacturer:
ROHM/罗姆
Quantity:
20 000
The following parameters represent design guaranteed performance.
BU7322HFV(Ta=25℃, VDD=3.3V, Crystal frequency=27.0000MHz, unless otherwise specified.)
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
BU7325HFV ( Ta=25 ℃ , VDD=3.3V, Crystal frequency=27.0000MHz, unless otherwise specified. )
The following parameters represent design guaranteed performance.
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
Common to BU3071HFV, BU3072HFV, BU3073HFV, BU3076HFV, BU7322HFV, BU7325HFV
∗1
This parameter represents standard deviation (=1σ) on cycle distribution data at the time when the output clock cycles are
sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
∗2
This parameter represents a maximum distribution width on cycle distribution data at the time when the output clock cycles are
sampled 1000 times consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
∗3
This parameter represents elapsed time after power supply turns ON to reach a voltage of 3.0 V, after the system is switched from
Power-Down state to normal operation state, or after the output frequency is switched, until it is stabilized at a specified frequency,
respectively.
Output H voltage
Output L voltage
Pull-down resistance
Consumption current 1
Consumption current 2
Standby current
Output frequency
Duty
Period-Jitter 1σ
Period-Jitter MIN-MAX
Rise time
Fall time
Output Lock time
Output H voltage
Output L voltage
Pull-down resistance
Consumption current 1
Consumption current 2
Standby current
Output frequency
Duty
Period-Jitter 1σ
Period-Jitter MIN-MAX
Rise time
Fall time
Output Lock time
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
Period-Jitter 1σ
Period-Jitter MIN-MAX
Output Lock Time
Parameter
Parameter
CLK_49.5
CLK_48
CLK_78
PJsABS
CLK_36
PJsABS
PJsSD
tLOCK
PJsSD
tLOCK
Symbol
IDDst
Symbol
IDDst
IDD1
IDD2
IDD2
VOH
Duty
VOH
VOL
VOL
Duty
Rpd
Rpd
IDD
tr
tr
tf
tf
Min.
Min.
2.8
2.8
25
45
25
45
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
49.5000
36.0000
48.0000
78.0000
Typ.
300
Typ.
9.5
2.5
2.5
50
10
50
50
300
50
11
12
1.5
1.5
50
50
-
-
-
-
-
-
-
-
4/20
Max.
Max.
13.5
13.0
16.5
100
200
100
200
0.5
0.5
55
15
55
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
psec
psec
nsec
nsec
usec
psec
psec
nsec
nsec
usec
MHz
MHz
Unit
μ A
Unit
k Ω
μ A
mA
mA
k Ω
mA
mA
%
%
V
V
V
V
IOH=-4.0mA
IOL=4.0mA
Pull-down resistance on input pin
49.5MHz output, at no load
36.0MHz output, at no load
OE=L
SEL=L, IN*66/6/6
SEL=H, IN*64/6/8
Measured at a voltage of 1/2 of VDD
※1
※2
Period of transition time required for the
output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
output to reach 20% from 80% of VDD.
Provided with 15pF output load.
※3
IOH=-4.0mA
IOL=4.0mA
Pull-down resistance on input pin
OE=H, SEL=L, at no load
OE=H, SEL=H, at no load
OE=L
SEL=L, IN*96/9/6
SEL=H, IN*104/9/4
Measured at a voltage of 1/2 of VDD
※1
※2
Period of transition time required for the
output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
output to reach 20% from 80% of VDD.
Provided with 15pF output load.
※3
Conditions
Conditions

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