ADC0804LCN National Semiconductor, ADC0804LCN Datasheet - Page 22

• Manufacturer Part Number: ADC0804LCN
• Description: IC, ADC, 8BIT, 9708SPS, DIP-20
• Manufacturer: National Semiconductor

Specifications of ADC0804LCN

• Resolution (bits): 8bit
• Sampling Rate: 9.708kSPS
• Input Channel Type: Differential
• Data Interface: CMOS, Parallel, TTL
• Supply Current: 1.9mA
• Digital Ic Case Style: DIP
• No. Of Pins: 20
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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Functional Description
2.5 Errors and Reference Voltage Adjustments
2.5.1 Zero Error
The zero of the A/D does not require adjustment. If the
minimum analog input voltage value, V
a zero offset can be done. The converter can be made to
output 0000 0000 digital code for this minimum input voltage
by biasing the A/D V
Applications section). This utilizes the differential mode op-
eration of the A/D.
The zero error of the A/D converter relates to the location of
the first riser of the transfer function and can be measured by
grounding the V
positive voltage to the V
ence between the actual DC input voltage that is necessary
to just cause an output digital code transition from 0000 0000
to 0000 0001 and the ideal
for V
2.5.2 Full-Scale
The full-scale adjustment can be made by applying a differ-
ential input voltage that is 1
analog full-scale voltage range and then adjusting the mag-
nitude of the V
not used) for a digital output code that is just changing from
1111 1110 to 1111 1111.
2.5.3 Adjusting for an Arbitrary Analog Input Voltage
Range
If the analog zero voltage of the A/D is shifted away from
ground (for example, to accommodate an analog input signal
that does not go to ground) this new zero reference should
be properly adjusted first. A V
desired zero reference plus
culated for the desired analog span, 1 LSB=analog span/
REF
/2=2.500 V
a) Analog Input Signal Example
FIGURE 7. Adapting the A/D Analog Input Voltages to Match an Arbitrary Input Signal Range
REF
IN
/2 input (pin 9 or the V
(−) input and applying a small magnitude
DC
IN
).
(−) input at this V
IN
(+) input. Zero error is the differ-
1
⁄
1
2
1
⁄
2
⁄
IN
LSB value (
2
LSB (where the LSB is cal-
(+) voltage that equals this
LSB less than the desired
DS005671-87
IN(MIN)
(Continued)
CC
IN(MIN)
1
⁄
2
supply if pin 9 is
, is not ground,
LSB = 9.8 mV
value (see
*
22
Add if V
256) is applied to pin 6 and the zero reference voltage at pin
7 should then be adjusted to just obtain the 00
code transition.
The full-scale adjustment should then be made (with the
proper V
V
where:
and
(Both are ground referenced.)
The V
code change from FE
adjustment procedure.
2.6 Clocking Option
The clock for the A/D can be derived from the CPU clock or
an external RC can be added to provide self-clocking. The
CLK IN (pin 4) makes use of a Schmitt trigger as shown in
Figure 8 .
IN
REF
V
V
b) Accommodating an Analog Input from
(+) input which is given by:
MAX
MIN
/2
REF
0.5V (Digital Out = 00
=the low end (the offset zero) of the analog range.
=The high end of the analog input range
1 V
IN
/2 (or V
(−) voltage applied) by forcing a voltage to the
DC
with LM358 to draw 3 mA to ground.
(Digital Out=FF
CC
) voltage is then adjusted to provide a
HEX
to FF
HEX
HEX
) to 3.5V
HEX
)
. This completes the
DS005671-88
HEX
to 01
HEX