CS4382-KQZ Cirrus Logic Inc, CS4382-KQZ Datasheet - Page 21

• Manufacturer Part Number: CS4382-KQZ
• Description: IC, DAC, 24BIT, 192KSPS, LQFP-48
• Manufacturer: Cirrus Logic Inc

Specifications of CS4382-KQZ

• Resolution (bits): 24bit
• Sampling Rate: 192kSPS
• Input Channel Type: Serial
• Supply Voltage Range - Analog: 4.5V To 5.5V
• Supply Current: 60mA
• Digital Ic Case Style: QFP
• Data Interface: Serial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS514F2
4.4.3
4.5
4.5.1
4.6
4.6.1
Px_A=B
INV_B4
7
0
7
0
Invert Control (Address 05h)
Mixing Control Pair 1 (Channels A1 & B1)(Address 06h)
Mixing Control Pair 2 (Channels A2 & B2)(Address 09h)
Mixing Control Pair 3 (Channels A3 & B3)(Address 0Ch)
Mixing Control Pair 4 (Channels A4 & B4)(Address 0Fh)
Selects the appropriate digital filter to maintain the standard 15 ms/50 ms digital de-emphasis filter re-
sponse at 32, 44.1 or 48 kHz sample rates. (see
De-emphasis is only available in Single-Speed Mode.
Soft Ramp-Down Before Filter Mode Change (RMP_DN)
Default = 0
0 - Disabled
1 - Enabled
Function:
A mute will be performed prior to executing a filter mode change. When this feature is enabled, this mute
is effected, similar to attenuation changes, by the Soft and Zero Cross bits in the Mode Control 3 register.
When disabled, an immediate mute is performed prior to executing a filter mode change.
Note:
Invert Signal Polarity (INV_XX)
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, these bits will invert the signal polarity of their respective channels.
Channel A Volume = Channel B Volume (A=B)
Default = 0
0 - Disabled
1 - Enabled
Function:
The AOUTAx and AOUTBx volume levels are independently controlled by the A and the B Channel Vol-
ume Control Bytes when this function is disabled. The volume on both AOUTAx and AOUTBx are deter-
mined by the A Channel Attenuation and Volume Control Bytes (per A-B pair), and the B Channel Bytes
are ignored when this function is enabled.
PxATAPI4
INV_A4
For best results, it is recommended that this feature be used in conjunction with the RMP_UP bit.
6
0
6
0
PxATAPI3
INV_B3
5
0
5
1
PxATAPI2
INV_A3
4
0
4
0
Figure
PxATAPI1
INV_B2
3
0
3
0
39)
PxATAPI0
INV_A2
2
0
2
1
INV_B1
PxFM1
1
0
1
0
CS4382
INV_A1
PxFM0
0
0
0
0
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