SCC68692C1A44 NXP Semiconductors, SCC68692C1A44 Datasheet - Page 13

• Manufacturer Part Number: SCC68692C1A44
• Description: UART, DUAL, SMD, 68692C1, PLCC44
• Manufacturer: NXP Semiconductors

Specifications of SCC68692C1A44

• No. Of Channels: 2
• Uart Features: Quadruple Buffered Receiver Data Register
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: PLCC
• No. Of Pins: 44
• Data Rate: 115.2Kilobaud
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The level at the OP pin is the inverse of the bit in the OPR register.
Philips Semiconductors
Table 2.
NOTE:
*In block error mode, block error conditions must be cleared by using the error reset command (command 4x) or a receiver reset.
* See Table 6 for BRG Test frequencies in this data sheet, and “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692,
SCC68681 and SCC2698B” in application notes elsewhere in this publication
NOTE:
2004 Mar 03
NOTE: *Add 0.5 to values shown for 0 – 7 if channel is programmed for 5 bits/char.
NOTE: Access to the miscellaneous commands should be separated by 3 X1 clock edges. A disabled transmitter cannot be loaded.
NOTE: *These status bits are appended to the corresponding data character in the receive FIFO. A read of the status provides these bits
(7:5) from the top of the FIFO together with bits (4:0). These bits are cleared by a “reset error status” command. In character mode they are
discarded when the corresponding data character is read from the FIFO. In block error mode, block error conditions must be cleared by using
the error reset command (command 4x) or a receiver reset.
OPR bit
OP pin
Dual asynchronous receiver/transmitter (DUART)
OPR
MR1A
MR1A
MR1B
MR2A
MR2A
MR2B
CSRA
CSRA
CSRB
CSRB
OPCR
CRA
CRB
CRB
ACR
SRA
SRB
SRB
0
1
Register Bit Formats
BIT 7
0 = OPR[7]
1 = TxRDYB
RECEIVED
BIT 7
CONTROL
BRG SET
BREAK*
SELECT
0 = set 1
1 = set 2
0 = No
1 = Yes
RxRTS
BIT 7
BIT 7
BIT 7
0 = No
1 = Yes
1
0
OP7
BIT 7
BIT 7
BIT 7
CHANNEL MODE
00 = Normal
01 = Auto-Echo
10 = Local loop
11 = Remote loop
MISCELLANEOUS COMMANDS
0
1
BIT 6
RECEIVER CLOCK SELECT
0 = OPR[6]
1 = TxRDYA
FRAMING
ERROR*
BIT 6
0 = RxRDY
1 = FFULL
0 = No
1 = Yes
BIT 6
BIT 6
BIT 6
SELECT
OP6
BIT 6
1
0
RxINT
BIT 6
See Text
BIT 6
See Text
MODE AND SOURCE
COUNTER/TIMER
0
1
BIT 5
1 = RxRDY/
0 = OPR[5]
See Table 4
BIT 5
ERROR*
PARITY
0 = No
1 = Yes
BIT 5
BIT 5
BIT 5
BIT 5
OP5
FFULLB
0 = Char
1 = Block
CONTROL
1
0
ERROR
MODE*
0 = No
1 = Yes
BIT 5
TxRTS
BIT 5
0
1
BIT 4
1 = RxRDY/
0 = OPR[4]
BIT 4
OVERRUN
BIT 4
ERROR
0 = No
1 = Yes
BIT 4
BIT 4
BIT 4
OP4
FFULLA
13
1
0
BIT 4
ENABLE Tx
00 = With Parity
01 = Force Parity
10 = No Parity
11 = Multidrop Mode
PARITY MODE
0 = No
1 = Yes
BIT 4
DISABLE Tx
CTS
0 = No
1 = Yes
0
1
BIT 3
BIT 3
0 = Off
1 = On
IP3 INT
DELTA
TxEMT
0 = No
1 = Yes
BIT 3
BIT 3
BIT 3
00 = OPR[3]
01 = C/T OUTPUT
10 = TxCB(1x)
11 = RxCB(1x)
BIT 3
BIT 3
1
0
0 = 0.563
1 = 0.625
2 = 0.688
3 = 0.750
BIT 3
OP3
ENABLE Tx
TRANSMITTER CLOCK SELECT
0
1
0 = No
1 = Yes
BIT 2
BIT 2
0 = Off
1 = On
IP2 INT
DELTA
BIT 2
TxRDY
0 = No
1 = Yes
BIT 2
BIT 2
0 = Even
BIT 2
PARITY
1 = Odd
TYPE
BIT 2
4 = 0.813
5 = 0.875
6 = 0.938
7 = 1.000
1
0
BIT 2
STOP BIT LENGTH*
See Text
DISABLE Rx
0
1
0 = No
1 = Yes
BIT 1
BIT 1
0 = Off
1 = On
IP1 INT
DELTA
BIT 1
FFULL
0 = No
1 = Yes
BIT 1
BIT 1
BIT 1
8 = 1.563
9 = 1.625
A = 1.688
B = 1.750
BIT 1
BIT 1
00 = OPR[2]
01 = TxCA(16x)
10 = TxCA(1x)
11 = RxCA(1x)
SCC68692
1
0
CHARACTER
BITS PER
OP2
00 = 5
01 = 6
10 = 7
11 = 8
ENABLE Rx
0
1
BIT 0
Product data
0 = Off
1 = On
C = 1.813
D = 1.875
E = 1.938
F = 2.000
BIT 0
IP0 INT
DELTA
0 = No
1 = Yes
BIT 0
RxRDY
BIT 0
0 = No
1 = Yes
BIT 0
BIT 0
BIT 0
BIT 0
1
0