IC, LATTICEXP2 FPGA, 435MHZ, QFP-208

 

LFXP2-8E-5QN208C

Manufacturer Part NumberLFXP2-8E-5QN208C
DescriptionIC, LATTICEXP2 FPGA, 435MHZ, QFP-208
ManufacturerLATTICE SEMICONDUCTOR
SeriesLatticeXP2
LFXP2-8E-5QN208C datasheets

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Specifications of LFXP2-8E-5QN208C

No. Of Logic Blocks8000No. Of Macrocells4000
Family TypeLatticeXP2No. Of Speed Grades5
No. Of I/o's146Clock ManagementPLL
Total Ram Bits221KbitLead Free Status / RoHS StatusLead free / RoHS Compliant
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Lattice Semiconductor
LVPECL
The LatticeXP2 devices support the differential LVPECL standard. This standard is emulated using complementary
LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The LVPECL input standard is
supported by the LVDS differential input buffer. The scheme shown in Figure 3-3 is one possible solution for point-
to-point signals.
Figure 3-3. Differential LVPECL
V
= 3.3V
CCIO
(+/-5%)
16mA
V
= 3.3V
CCIO
(+/-5%)
16mA
On-chip
Table 3-3. LVPECL DC Conditions
Parameter
V
CCIO
Z
OUT
R
S
R
P
R
T
V
OH
V
OL
V
OD
V
CM
Z
BACK
I
DC
1. For input buffer, see LVDS table.
R
= 93.1 ohms
S
(+/-1%)
R
= 196 ohms
P
(+/-1%)
R
= 93.1 ohms
S
(+/-1%)
Transmission line,
Zo = 100 ohm differential
Off-chip
1
Over Recommended Operating Conditions
Description
Output Driver Supply (+/-5%)
Driver Impedance
Driver Series Resistor (+/-1%)
Driver Parallel Resistor (+/-1%)
Receiver Termination (+/-1%)
Output High Voltage (After R
)
1
Output Low Voltage (After R
)
1
Output Differential Voltage (After R
1
Output Common Mode Voltage
Back Impedance
DC Output Current
3-11
DC and Switching Characteristics
LatticeXP2 Family Data Sheet
+
R
= 100 ohms
T
-
(+/-1%)
Off-chip
On-chip
Typical
Units
3.30
V
10
Ω
93
Ω
196
Ω
100
Ω
2.05
V
1.25
V
)
0.80
V
1.65
V
100.5
Ω
12.11
mA