ISPLSI2064A-100LJN84 LATTICE SEMICONDUCTOR, ISPLSI2064A-100LJN84 Datasheet
ISPLSI2064A-100LJN84
Specifications of ISPLSI2064A-100LJN84
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ISPLSI2064A-100LJN84 Summary of contents
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... Interconnectivity — Lead-Free Package Options Copyright © 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A. ...
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Functional Block Diagram Figure 1. ispLSI 2064/A Functional Block Diagram Megablock I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 I/O 8 I/O 9 I/O 10 I/O 11 I/O 12 I/O 13 I/O ...
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Absolute Maximum Ratings Supply Voltage V cc ................................................... Input Voltage Applied .............................. -2 Off-State Output Voltage Applied ........... -2 Storage Temperature ..................................... -65 to 150°C Case Temp. with Power Applied .................... -55 to 125°C Max. Junction ...
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... Typical values are and T = 25° Maximum I varies widely with specific device configuration and operating frequency. Refer to the Power Consumption CC section of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to estimate maximum Specifications ispLSI 2064/A Figure 2. Test Load GND to 3 ...
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External Timing Parameters 4 TEST 2 PARAMETER # COND Data Propagation Delay, 4PT Bypass, ORP Bypass pd1 Data Propagation Delay pd2 Clock Frequency with Internal Feedback max f – 4 Clock ...
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Internal Timing Parameters 2 PARAMETER DESCRIPTION # Inputs Input Buffer Delay t din 21 Dedicated Input Delay GRP t grp 22 GRP Delay GLB t 4ptbp 4 Product Term Bypass Comb. Path Delay 23 t 4ptbp 24 ...
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Timing Model I/O Cell Ded. In #21 I/O Delay I/O Pin #20 (Input) #45 Reset Y0,1,2 GOE 0 Derivations of su, h and co from the Product Term Clock Logic + Reg ...
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Power Consumption Power consumption in the ispLSI 2064 and 2064A de- vices depends on two primary factors: the speed at which the device is operating and the number of Product Terms Figure 4. Typical Device Power Consumption vs fmax 160 ...
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Pin Description NAME PLCC PIN NUMBERS I I/O 3 26, 27, 30, 31, I I I/O 11 34, 35, 38, 39, I I I/O 19 45, ...
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Pin Description NAME TQFP PIN NUMBERS I I/O 3 17, 18, I I/O 7 21, 22, I I/O 11 29, 30, I I/O 15 33, 34, I I/O 19 40, ...
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Pin Configuration ispLSI 2064/A 84-Pin PLCC Pinout Diagram I I I/O 60 ...
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Pin Configuration ispLSI 2064/A 100-Pin TQFP Pinout Diagram ...
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Part Number Description ispLSI XXXXX Device Family 2064 2064A Device Number Speed f 125 = 125 MHz max f 100 = 100 MHz max MHz max ispLSI 2064/A Ordering Information Conventional Packaging FAMILY fmax (MHz) tpd ...
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Ordering Information (Cont.) Lead-Free Packaging FAMILY fmax (MHz) tpd (ns) 125 125 100 ispLSI 100 84-PLCC lead-free package is MSL4. Refer to “Handling Moisture Sensitive Packages” document on www.latticesemi.com. FAMILY fmax (MHz) tpd (ns) 81 ...