74HC393N NXP Semiconductors, 74HC393N Datasheet - Page 2

• Manufacturer Part Number: 74HC393N
• Description: IC, 74HC CMOS, 74HC393, DIP14, 5V
• Manufacturer: NXP Semiconductors

Specifications of 74HC393N

• Counter Type: Binary
• Clock Frequency: 107MHz
• Count Maximum: 15
• Supply Voltage Range: 2V To 6V
• Logic Case Style: DIP
• No. Of Pins: 14
• Operating Temperature Range: -40°C To +125°C
• Svhc: No SVHC
• Base Number: 74
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Philips Semiconductors
FEATURES
GENERAL DESCRIPTION
The 74HC/HCT393 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
December 1990
t
f
C
C
PHL
max
SYMBOL
Two 4-bit binary counters with individual clocks
Divide-by any binary module up to 28 in one package
Two master resets to clear each 4-bit counter
individually
Output capability: standard
I
Dual 4-bit binary ripple counter
I
PD
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
/ t
CC
PD
= input frequency in MHz
L
category: MSI
= output frequency in MHz
(C
PLH
= output load capacitance in pF
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
L
D
= C
V
amb
CC
PD
propagation delay
nCP to nQ
nQ to nQ
nMR to nQ
maximum clock frequency
input capacitance
power dissipation capacitance per counter
2
= 25 C; t
V
f
o
CC
) = sum of outputs
2
n 1
0
n
f
r
i
= t
PARAMETER
I
I
f
= GND to V
= GND to V
= 6 ns
(C
L
V
CC
2
CC
CC
f
o
) where:
1.5 V
2
.
The 74HC/HCT393 are 4-bit binary ripple counters with
separate clocks (1CP and 2 CP) and master reset (1MR
and 2MR) inputs to each counter. The operation of each
half of the “393” is the same as the “93” except no external
clock connections are required.
The counters are triggered by a HIGH-to-LOW transition of
the clock inputs. The counter outputs are internally
connected to provide clock inputs to succeeding stages.
The outputs of the ripple counter do not change
synchronously and should not be used for high-speed
address decoding.
The master resets are active-HIGH asynchronous inputs
to each 4-bit counter identified by the “1” and “2” in the pin
description.
A HIGH level on the nMR input overrides the clock and
sets the outputs LOW.
C
notes 1 and 2
D
L
in W):
= 15 pF; V
CONDITIONS
CC
= 5 V
12
5
11
99
3.5
23
HC
74HC/HCT393
TYPICAL
Product specification
20
6
15
53
3.5
25
HCT
ns
ns
ns
MHz
pF
pF
UNIT