74HC4024D NXP Semiconductors, 74HC4024D Datasheet
74HC4024D
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74HC4024D Summary of contents
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Rev. 4 — 29 September 2010 1. General description The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024 of the 4000B series. The 74HC4024 is specified in compliance with ...
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... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Package Temperature range −40 °C to +125 °C 74HC4024N −40 °C to +125 °C 74HC4024D −40 °C to +125 °C 74HC4024DB −40 °C to +125 °C 74HC4024PW 5. Functional diagram 001aab906 Fig 1. Logic symbol Fig 4. Logic diagram ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 5. Pin configuration 6.2 Pin description Table 2. Pin description Symbol CP MR Q6, Q5, Q4, Q3, Q2, Q2, Q1, Q0 GND n. Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level don’t care; ↑ = LOW-to-HIGH clock transition; ...
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... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK I output clamping current OK I output current O I supply current CC I ground current ...
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... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = 25 °C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I supply current ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current I I supply current CC = −40 °C to +125 °C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage ...
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... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics GND = ns pF; see Symbol Parameter = 25 °C T amb t propagation delay pd t HIGH to LOW PHL propagation delay t transition time t t pulse width W t recovery time rec f maximum frequency max C power dissipation PD capacitance 74HC4024 Product data sheet Figure 7 ...
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... NXP Semiconductors Table 7. Dynamic characteristics GND = ns pF; see Symbol Parameter = −40 °C to +85 °C T amb t propagation delay pd t HIGH to LOW PHL propagation delay t transition time t t pulse width W t recovery time rec f maximum frequency max 74HC4024 Product data sheet …continued Figure 7 ...
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... NXP Semiconductors Table 7. Dynamic characteristics GND = ns pF; see Symbol Parameter = −40 °C to +125 °C T amb t propagation delay pd t HIGH to LOW PHL propagation delay t transition time t t pulse width W t recovery time rec 74HC4024 Product data sheet …continued Figure 7. Conditions CP to Q0; see ...
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... NXP Semiconductors Table 7. Dynamic characteristics GND = ns pF; see Symbol Parameter f maximum frequency max [ the same as t and PLH PHL [ the same as t and THL TLH [ used to determine the dynamic power dissipation (P PD × V × f × ∑( input frequency in MHz output frequency in MHz; ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance. L Fig 7. Test circuit for measuring switching times Table 8. Test data Supply Input 74HC4024 Product data sheet ...
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... NXP Semiconductors 13. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors SSOP14: plastic shrink small outline package; 14 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT337-1 Fig 10. Package outline SOT337-1 (SSOP14) ...
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... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... Product data sheet Data sheet status Product data sheet The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Figure 1: inversion dot removed for MR pin. ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74HC4024 Product data sheet 16 ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 13 Package outline ...