HEF4044BP NXP Semiconductors, HEF4044BP Datasheet - Page 2

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HEF4044BP

Manufacturer Part Number
HEF4044BP
Description
IC, 4000 LOCMOS LOGIC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF4044BP

Latch Type
SR
Output Current
2.4mA
Propagation Delay
30ns
No. Of Bits
4
Supply Voltage Range
4.5V To 15.5V
Logic Case Style
DIP
No. Of Pins
16
Operating Temperature Range
-40°C To +70°C
Svhc
No SVHC
Ic Output Type
Tri State Non Inverted
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HEF4044BP
Manufacturer:
TE
Quantity:
6 000
Philips Semiconductors
The HEF4044B is a quadruple R/S latch with 3-state
outputs with a common output enable input (EO). Each
latch has an active LOW set input (S
LOW reset input (R
output (O
When EO is HIGH, the state of the latch output (O
determined from the function table below. When EO is
LOW, the latch outputs are in the high impedance
OFF-state. EO does not affect the state of the latch.
The high impedance off-state feature allows common
busing of the outputs.
January 1995
Quadruple R/S latch with 3-state outputs
0
to O
3
Fig.1 Functional diagram.
).
0
to R
3
) and an active HIGH 3-state
0
to S
3
), an active
n
) can be
2
PINNING
FUNCTION TABLE
Notes
1. H = HIGH state (the more positive voltage)
FAMILY DATA, I
See Family Specifications
HEF4044BP(N): 16-lead DIL; plastic (SOT38-1)
HEF4044BD(F): 16-lead DIL; ceramic (cerdip) (SOT74)
HEF4044BT(D): 16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
EO
S
R
O
0
0
0
to S
L = LOW state (the less positive voltage)
X = state immaterial
Z = high impedance OFF-state
to R
to O
EO
H
H
H
L
3
3
3
INPUTS
DD
Fig.2 Pinning diagram.
common output enable input
set inputs (active LOW)
reset inputs (active LOW)
3-state buffered latch outputs
S
H
X
X
LIMITS category MSI
L
n
R
X
H
H
L
n
Product specification
HEF4044B
OUTPUT
latched
O
H
Z
L
n
MSI

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