HEF4021BP NXP Semiconductors, HEF4021BP Datasheet

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HEF4021BP

Manufacturer Part Number
HEF4021BP
Description
IC, 4000 LOCMOS, 4021, DIP16, 15V
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF4021BP

No. Of Elements
1
Ic Output Type
Standard
Logic Case Style
DIP
No. Of Pins
16
Supply Voltage Range
4.5V To 15.5V
Operating Temperature Range
-40°C To +70°C
Svhc
No
Logic Type
Shift Register
Shift Register Function
Parallel To Serial
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Product specification
File under Integrated Circuits, IC04
DATA SHEET
HEF4021B
MSI
8-bit static shift register
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
INTEGRATED CIRCUITS
January 1995

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HEF4021BP Summary of contents

Page 1

DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4021B MSI 8-bit static shift register Product specification File under Integrated Circuits, ...

Page 2

... S in the register is shifted one position to the right on the LOW to HIGH transition of CP. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Fig.1 Functional diagram. HEF4021BP(N): HEF4021BD(F): HEF4021BT(D Package Designator North America FAMILY DATA ...

Page 3

Acrobat reader. white to force landscape pages to be ... Fig.3 Logic diagram. ...

Page 4

Philips Semiconductors 8-bit static shift register FUNCTION TABLES Serial operation INPUTS ...

Page 5

Philips Semiconductors 8-bit static shift register AC CHARACTERISTICS pF; input transition times SS amb Set-up time ...

Page 6

Philips Semiconductors 8-bit static shift register Fig.4 Waveforms showing minimum clock pulse width, set-up time and hold time for CP and D Fig.5 Waveforms showing minimum PL pulse width, recovery time for PL, and set-up and hold times for P ...

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