IS43DR16640A-3DBL INTEGRATED SILICON SOLUTION (ISSI), IS43DR16640A-3DBL Datasheet - Page 13

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IS43DR16640A-3DBL

Manufacturer Part Number
IS43DR16640A-3DBL
Description
SDRAM, DDR2, 64M X 16, 1.8V, 84BGA
Manufacturer
INTEGRATED SILICON SOLUTION (ISSI)
Datasheet

Specifications of IS43DR16640A-3DBL

Access Time
0.45ns
Memory Case Style
BGA
No. Of Pins
84
Memory Type
SDRAM
Memory Configuration
8 BLK (8M X 16)
Page Size
1GB
Operating Temperature Range
0°C To +70°C
Frequency
333MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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IS43/46DR81280A, IS43/46DR16640A
ODT Timing for Active/Standby (Idle) Mode and Standard Active Power-Down Mode
Notes:
1.
2.
3.
ODT Timing for Precharge Power-Down Mode
Note: Both ODT to Power Down Endtry and Exit Latencies tANPD and tAXPD are not met, therefore Power-Down Mode timings have to be applied.
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. B, 06/01/2011
Internal Term.
Internal Term.
Resistance
Both ODT to Power Down Entry and Exit Latency timing parameter tANPD and tAXPD are met, therefore Non-Power Down Mode timings have to be applied.
ODT turn-on time, tAON(Min) is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max, tAON(Max) is when the
ODT resistance is fully on. Both are measured from tAOND.
ODT turn off time min, tAOF(Min), is when the device starts to turn off the ODT resistance. ODT turn off time max, tAOF(Max) is when the bus is in high
impedance. Both are measured from tAOFD.
Resistance
CKE
ODT
CK#
ODT
CKE
CK#
CK
CK
tIS
0
~
~
~
~
1
0
tAXPD
tAXPD
2
1
VIH(AC)
VIH(AC)
tIS
tIS
3
2
tAONPD(Min)
tAONPD(Max)
tAOND
4
3
tAON(Min)
VIL(AC)
VIL(AC)
tIS
tIS
5
4
tAON(Max)
tAOFD (Min)
6
5
tAOFD (Max)
RTT
tAOFD
RTT
tANPD
tANPD
tAOF(Min)
7
6
tAOF(Max)
tIS
8
7
13

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