S29GL256P10TFI010 Spansion Inc., S29GL256P10TFI010 Datasheet - Page 66

IC, FLASH, 256MBIT, 100NS, TSOP-56

S29GL256P10TFI010

Manufacturer Part Number
S29GL256P10TFI010
Description
IC, FLASH, 256MBIT, 100NS, TSOP-56
Manufacturer
Spansion Inc.

Specifications of S29GL256P10TFI010

Memory Type
Flash
Memory Size
256Mbit
Memory Configuration
32M X 8 / 16M X 16
Ic Interface Type
CFI, Parallel
Access Time
100ns
Supply Voltage Range
2.7 To 3.6 V
Memory Case Style
TSOP
Data Bus Width
8 bit, 16 bit
Architecture
Uniform
Interface Type
Page-mode
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
50 mA
Mounting Style
SMD/SMT
Operating Temperature
+ 85 C
Package / Case
TSOP-56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Notes
1. Typical program and erase times assume the following conditions: 25°C, 3.6 V V
2. Under worst case conditions of -40°C, V
3. Effective write buffer specification is based upon a 32-word write buffer operation.
4. The typical chip programming time is considerably less than the maximum chip programming time listed, since most words program faster than the maximum
5. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
6. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Tables 12.1–12.4.
66
Sector Erase Time
Chip Erase Time
Total Write Buffer Time
Total Accelerated Write Buffer Programming Time
(Note 3)
Chip Program Time
11.7.5
program times listed.
11.7.6
Erase And Programming Performance
TSOP Pin and BGA Package Capacitance
Notes
1. Sampled, not 100% tested.
2. Test conditions T
(Note 4)
RESET#, WP#/ACC
Parameter
Parameter Symbol
(Note 3)
C
C
CE#
C
OUT
IN2
IN
CC
A
S29GL01GP
S29GL01GP
S29GL128P
S29GL256P
S29GL512P
S29GL128P
S29GL256P
S29GL512P
= 25°C, f = 1.0 MHz.
= 3.0 V, 100,000 cycles.
Table 11.8 Erase And Programming Performance
S29GL-P MirrorBit
Control Pin Capacitance
Parameter Description
Separated Control Pin
Separated Control Pin
D a t a
Output Capacitance
Input Capacitance
Table 11.9 Package Capacitance
(Note 1)
Typ
128
256
512
480
432
123
246
492
984
0.5
64
S h e e t
CC
®
Flash Family
, 10,000 cycles, checkerboard pattern.
( P r e l i m i n a r y )
(Note 2)
1024
2048
Max
256
512
3.5
Test Setup
V
V
V
V
V
OUT
IN
IN
IN
IN
= 0
= 0
= 0
= 0
= 0
Unit
sec
sec
sec
µs
µs
S29GL-P_00_A7 November 8, 2007
Excludes 00h programming
prior to erasure
Excludes system level
overhead
Typ
10
42
22
6
8
Comments
(Note 6)
Max
10
12
10
45
25
(Note 5)
Unit
pF
pF
pF
pF
pF

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