S25FL016K0XMFI011 Spansion Inc., S25FL016K0XMFI011 Datasheet - Page 43

• Manufacturer Part Number: S25FL016K0XMFI011
• Description: MEMORY, FLASH, 16M, 3V, SPI, 8SOIC
• Manufacturer: Spansion Inc.

Specifications of S25FL016K0XMFI011

• Memory Size: 16Mbit
• Clock Frequency: 104MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SO
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Interface: SPI
• Memory Type: RoHS Compliant
• Memory Configuration: 8K X 256 Bytes
• Interface Type: SPI
• Rohs Compliant: Yes

7.23
September 8, 2010 S25FL016K_00_02
Erase / Program Suspend (75h)
The Erase/Program Suspend instruction “75h”, allows the system to interrupt a Sector or Block Erase
operation or a Page Program operation and then read from or program/erase data to, any other sectors or
blocks. The Erase/Program Suspend instruction sequence is shown in
Instruction Sequence on page
The Write Status Register instruction (01h) and Erase instructions (20h, 52h, D8h, C7h, 60h, 44h) are not
allowed during Erase Suspend. Erase Suspend is valid only during the Sector or Block erase operation. If
written during the Chip Erase operation, the Erase Suspend instruction is ignored. The Write Status Register
instruction (01h) and Program instructions (02h, 32h, 42h) are not allowed during Program Suspend.
Program Suspend is valid only during the Page Program or Quad Page Program operation.
The Erase/Program Suspend instruction “75h” will be accepted by the device only if the SUS bit in the Status
Register equals to 0 and the BUSY bit equals to 1 while a Sector or Block Erase or a Page Program operation
is on-going. If the SUS bit equals to 1 or the BUSY bit equals to 0, the Suspend instruction will be ignored by
the device. A maximum of time of “t
suspend the erase or program operation. The BUSY bit in the Status Register will be cleared from 1 to 0
within “t
Suspend. For a previously resumed Erase/Program operation, it is also required that the Suspend instruction
“75h” is not issued earlier than a minimum of time of “t
Unexpected power off during the Erase/Program suspend state will reset the device and release the suspend
state. SUS bit in the Status Register will also reset to 0. The data within the page, sector or block that was
being suspended may become corrupted. It is recommended for the user to implement system design
techniques against the accidental power interruption and preserve data integrity during erase/program
suspend state.
CLK
CS#
SO
SI
SUS
Mode 3
Mode 0
” and the SUS bit in the Status Register will be set from 0 to 1 immediately after Erase/Program
D a t a
0
S h e e t
1
Figure 7.26 Erase/Program Suspend Instruction Sequence
Instruction (75h)
2
High Impedance
3
43.
( P r e l i m i n a r y )
SUS
4
”
5
S25FL016K
(See AC Electrical Characteristics on page
6
7
SUS
” following the preceding Resume instruction “7Ah”.
t
SUS
Figure 7.26, Erase/Program Suspend
Accept Read or Program Instruction
Mode 3
Mode 0
59.) is required to
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