S25FL016K0XMFI041 Spansion Inc., S25FL016K0XMFI041 Datasheet - Page 40

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S25FL016K0XMFI041

Manufacturer Part Number
S25FL016K0XMFI041
Description
MEMORY, FLASH, 16M, 3V, SPI, 8SOIC
Manufacturer
Spansion Inc.
Datasheet

Specifications of S25FL016K0XMFI041

Memory Size
16Mbit
Clock Frequency
104MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SO
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Interface
SPI
Memory Type
RoHS Compliant
Memory Configuration
8K X 256 Bytes
Interface Type
SPI
Rohs Compliant
Yes
7.20
40
32 KB Block Erase (52h)
The Block Erase instruction sets all memory within a specified block (32K-bytes) to the erased state of all 1s
(FFh). A Write Enable instruction must be executed before the device will accept the Block Erase Instruction
(Status Register bit WEL must equal 1). The instruction is initiated by driving the CS# pin low and shifting the
instruction code “52h” followed a 24-bit block address (A23-A0)
Erase instruction sequence is shown in
The CS# pin must be driven high after the eighth bit of the last byte has been latched. If this is not done the
Block Erase instruction will not be executed. After CS# is driven high, the self-timed Block Erase instruction
will commence for a time duration of t
Erase cycle is in progress, the Read Status Register instruction may still be accessed for checking the status
of the BUSY bit. The BUSY bit is a 1 during the Block Erase cycle and becomes a 0 when the cycle is finished
and the device is ready to accept other instructions again. After the Block Erase cycle has finished the Write
Enable Latch (WEL) bit in the Status Register is cleared to 0. The Block Erase instruction will not be executed
if the addressed sector is protected by the Block Protect (CMP, SEC, TB, BP2, BP1, and BP0) bits (see
Table 6.2, Status Register Memory Protection (CMP = 0) on page
CLK
SIO
CS#
SO
Figure 7.23 32 KB Block Erase Instruction Sequence Diagram
Mode 3
Mode 0
= MSB
D a t a
0
1
BE1
Instruction (52h)
Figure
2
S25FL016K
(See AC Electrical Characteristics on page
S h e e t
3
4
7.23.
5
High Impedance
6
( P r e l i m i n a r y )
7
23 22
8
9
See Block Diagram on page 9.
24-Bit Address
16).
2
S25FL016K_00_02 September 8, 2010
29 30 31
1
0
Mode 0
Mode 3
59.). While the Block
The Block

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