AM29F010B-70EF Spansion Inc., AM29F010B-70EF Datasheet

IC, FLASH, 1MBIT, 70NS, TSOP-32

AM29F010B-70EF

Manufacturer Part Number
AM29F010B-70EF
Description
IC, FLASH, 1MBIT, 70NS, TSOP-32
Manufacturer
Spansion Inc.
Datasheets

Specifications of AM29F010B-70EF

Memory Type
Flash
Memory Size
1Mbit
Memory Configuration
128K X 8
Access Time
70ns
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
TSOP
No. Of Pins
32
Cell Type
NOR
Density
1Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
17b
Operating Supply Voltage (typ)
5V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
4.5 to 5.5V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
128K
Supply Current
30mA
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM29F010B-70EF
Manufacturer:
AMD
Quantity:
20 000
Am29F010B
Data Sheet
Am29F010B Cover Sheet
The following document contains information on Spansion memory products.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any changes that have been
made are the result of normal data sheet improvement and are noted in the document revision summary.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number Am29F010B_00
Revision C
Amendment 10
Issue Date November 12, 2009

Related parts for AM29F010B-70EF

AM29F010B-70EF Summary of contents

Page 1

... For More Information Please contact your local sales office for additional information about Spansion memory solutions. Publication Number Am29F010B_00 Revision C Amendment 10 Am29F010B Cover Sheet Issue Date November 12, 2009 ...

Page 2

... This page left intentionally blank Am29F010B Am29F010B_00_C10 November 12, 2009 ...

Page 3

... Compatible with JEDEC standards — Pinout and software compatible with single-power-supply flash — Superior inadvertent write protection ■ Data# Polling and Toggle Bits — Provides a software method of detecting program or erase cycle completion Publication # Am29F010B_00 Revision: C Amendment: 10 Issue Date: November 12, 2009 ...

Page 4

... GENERAL DESCRIPTION The Am29F010B Mbit, 5.0 Volt-only Flash memory organized as 131,072 bytes. The Am29F010B is offered in 32-pin PLCC and TSOP packages. The byte-wide data appears on DQ0-DQ7. The device is designed to be programmed in-system with the standard system 5.0 Volt V supply. A 12.0 volt V CC for program or erase operations ...

Page 5

... Writing Commands/Command Sequences .............................. 7 Program and Erase Operation Status ...................................... 8 Standby Mode .......................................................................... 8 Output Disable Mode ................................................................ 8 Table 2. Am29F010B Sector Addresses Table .................................8 Autoselect Mode ....................................................................... 8 Table 3. Am29F010B Autoselect Codes (High Voltage Method) ......9 Sector Protection/Unprotection ................................................. 9 Hardware Data Protection ........................................................ 9 Command Definitions . . . . . . . . . . . . . . . . . . . . . . 10 Reading Array Data ................................................................ 10 Reset Command ..................................................................... 10 Autoselect Command Sequence ............................................ 10 Byte Program Command Sequence ...

Page 6

... Note: See the AC Characteristics section for full specifications. BLOCK DIAGRAM State WE# Control Command Register CE# OE# V Detector CC A0–A16 - Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder Am29F010B -55 - – DQ0 DQ7 Input/Output Buffers Data STB Latch Y-Gating Cell Matrix Am29F010B_00_C10 November 12, 2009 ...

Page 7

... A15 11 A12 PIN CONFIGURATION A0–A16 = 17 Addresses DQ0–DQ7 = 8 Data Inputs/Outputs CE# = Chip Enable OE# = Output Enable WE# = Write Enable V = +5.0 Volt Single Power Supply CC (See Product Selector Guide for speed options and voltage supply tolerances Device Ground Pin Not Connected Internally November 12, 2009 Am29F010B_00_C10 ...

Page 8

... Thin Small Outline Package (TSOP) Standard Pinout (TS 032) V Voltage CC Valid Combinations list configurations planned to be sup- 5.0 V ± 5% ported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations. 5.0 V ± 10% Valid Combinations Am29F010B_00_C10 November 12, 2009 ...

Page 9

... The command register it- self does not occupy any addressable memor y location. The register is composed of latches that store the commands, along with the address and data infor- mation needed to execute the command. The contents Table 1. Am29F010B Device Bus Operations Operation Read Write Standby ...

Page 10

... When the system is not reading or writing to the device, it can place the device in the standby mode. In this mode, current consumption is greatly reduced, and the outputs are placed in the high impedance state, inde- pendent of the OE# input. Table 2. Am29F010B Sector Addresses Table Sector A16 SA0 0 ...

Page 11

... Table 3. Am29F010B Autoselect Codes (High Voltage Method) Description CE# Manufacturer ID: AMD L Device ID: Am29F010B L Sector Protection Verification Logic Low = Logic High = V IL Sector Protection/Unprotection The hardware sector protection feature disables both program and erase operations in any sector. The hard- ware sector unprotection feature re-enables both program and erase operations in previously protected sectors ...

Page 12

... DQ5 to “1”, or cause the Data# Polling algorithm to indicate the operation was suc- cessful. However, a succeeding read will show that the data is still “0”. Only erase operations can convert a “0” “1”. Am29F010B_00_C10 November 12, 2009 on address bit A9. ID ...

Page 13

... Erase algorithm are ignored. The system can determine the status of the erase op- eration by using DQ7 or DQ6. See “Write Operation Status” for information on these status bits. When the November 12, 2009 Am29F010B_00_C10 Embedded Erase algorithm is complete, the device re- turns to reading array data and addresses are no longer latched ...

Page 14

... Command Sequence Data Poll from System No Data = FFh? Erasure Completed Notes: 1. See the appropriate Command Definitions table for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 2. Erase Operation Am29F010B_00_C10 November 12, 2009 Embedded Erase algorithm in progress Yes ...

Page 15

... Command Definitions Table 4. Am29F010B Command Definitions Command Sequence (Note 1) Read (Note 4) Reset (Note 5) Reset (Note 6) Manufacturer ID Device ID Autoselect (Note 7) Sector Protect Verify (Note 8) Program Chip Erase Sector Erase Erase Suspend (Note 9) Erase Resume (Note 10) Legend Don’t care RA = Address of the memory location to be read. ...

Page 16

... Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete. Toggle Bit I may be read at any address, and is valid after the rising edge of the final WE# pulse in the com- operation), and during the sector erase time-out. Am29F010B_00_C10 November 12, 2009 Yes No Yes Yes ...

Page 17

... Alternatively, it may choose to perform other system tasks. In this case, the system must start at the beginning of the algorithm when it returns to de- termine the status of the operation (top of Figure 4). November 12, 2009 Am29F010B_00_C10 START Read DQ7–DQ0 Read DQ7– ...

Page 18

... DQ3 is high on the second status check, the last com- mand might not have been accepted. Table 5 shows the outputs for DQ3. Table 5. Write Operation Status DQ7 (Note 1) DQ7 Data DQ5 DQ6 (Note 2) DQ3 Toggle 0 N/A Toggle toggle 0 N/A Data Data Data Am29F010B_00_C10 November 12, 2009 ...

Page 19

... C to +125° Supply Voltages CC V for ±5% devices . . . . . . . . . . .+4. +5. for ±10% devices . . . . . . . . . .+4. +5. Operating ranges define those limits between which the functionality of the device is guaranteed. November 12, 2009 Am29F010B_00_C10 +0.8 V –0.5 V –2.0 V Figure 5. Maximum Negative to –2 0.5 V. During volt – ...

Page 20

... Not 100% tested Test Description Max Max 12 Max OUT CE OE IL IL, IH CE# and Min –2.5 mA Min max Am29F010B_00_C10 November 12, 2009 Min Typ Max Unit ±1.0 µA 50 µA ±1.0 µ 0.4 1.0 mA –0.5 0 10.5 12.5 V 0.45 V 2.4 V 3.2 4.2 V ...

Page 21

... Lock-out Voltage LKO CC Notes: 1. The I current listed is typically less than 2 mA/MHz, with OE Maximum I specifications are tested with active while Embedded Program or Embedded Erase Algorithm is in progress Not 100% tested µA max at extended temperatures (> +85°C). CC3 November 12, 2009 Am29F010B_00_C10 Test Description Max Max ...

Page 22

... Output timing measurement reference levels INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) -45 All others Unit 1 TTL gate L 30 100 0.0–3.0 0.45–2.4 V 1.5 0.8 V 1.5 2.0 V OUTPUTS Changing, State Unknown Am29F010B_00_C10 November 12, 2009 ...

Page 23

... Output Hold Time From Addresses t t AXQX OH CE# or OE#, Whichever Occurs First Notes: 1. Not 100% tested. 2. See Figure 7 and Table 6 for test specifications. Addresses CE# OE# WE# Outputs November 12, 2009 Am29F010B_00_C10 Test Setup Read Toggle and Data Polling t RC Addresses Stable ...

Page 24

... Not 100% tested. 2. See the “Erase and Programming Performance” section for more informaiton Parameter Description Min Min Min Min Min Min Min Min Min Min Min Typ Typ Min Speed Options -45 -55 -70 Unit µs 1.0 sec 50 µs Am29F010B_00_C10 November 12, 2009 ...

Page 25

... Erase Command Sequence (last two cycles Addresses 2AAh CE Data t VCS V CC Note sector address (for Sector Erase Valid Address for reading status data (see “Write Operation Status”). Figure 10. Chip/Sector Erase Operation Timings November 12, 2009 Am29F010B_00_C10 WPH A0h is the true data at the program address. ...

Page 26

... Figure 12. Toggle Bit Timings (During Embedded Algorithms Complement Complement Status Data Status Data Valid Status Valid Status (first read) (second read) VA High Z Valid Data True High Z True Valid Data VA VA Valid Status Valid Data (stops toggling) Am29F010B_00_C10 November 12, 2009 ...

Page 27

... Byte Programming Operation (Note 2) WHWH1 WHWH1 t t Chip/Sector Erase Operation (Note 2) WHWH2 WHWH2 Notes: 1. Not 100% tested. 2. See the “Erase and Programming Performance” section for more information. November 12, 2009 Am29F010B_00_C10 Parameter Description Min Min Min Min Min Min Min Min ...

Page 28

... Typ (Note 1) Max (Note 2) 1 300 0.9 6.25 ° 4.5 V (4.75 V for -45), 100,000 cycles DQ7# D OUT = Array Data. OUT Unit Comments Excludes 00h programming prior to sec erasure (Note 4) µs Excludes system-level overhead (Note 5) sec , 1 million cycles. Additionally, CC Am29F010B_00_C10 November 12, 2009 ...

Page 29

... IN C Output Capacitance OUT C Control Pin Capacitance IN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A DATA RETENTION Parameter Description Minimum Pattern Data Retention Time November 12, 2009 Am29F010B_00_C10 5.0 Volt, one pin at a time. CC Test Conditions OUT Test Conditions ...

Page 30

... PHYSICAL DIMENSIONS PL 032—32-Pin Plastic Leaded Chip Carrier Am29F010B_00_C10 November 12, 2009 Dwg rev AH; 10/99 ...

Page 31

... PHYSICAL DIMENSIONS* (continued) TS 032—32-Pin Standard Thin Small Outline Package * For reference only. BSC is an ANSI standard for Basic Space Centering. November 12, 2009 Am29F010B_00_C10 Dwg rev AA; 10/99 29 ...

Page 32

... Removed notice to first page of data sheet and cover page. Revision C8 (March 2, 2009) Global Added obsolescence information. Revision C9 (August 3, 2009) Global Removed obsolescence information. Revision C10 (November 12, 2009) Global Removed 90 ns and 120 ns speed options. Removed all commercial temperature range options. Removed 32-pin PDIP option. Am29F010B_00_C10 November 12, 2009 ...

Page 33

... Copyright ©2006-2009 Spansion Inc. All rights reserved. Spansion RAM™ and combinations thereof, are trademarks and registered trademarks of Spansion LLC in the United States and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners. November 12, 2009 Am29F010B_00_C10 ® ...

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