LPC2468FBD208 NXP Semiconductors, LPC2468FBD208 Datasheet
LPC2468FBD208
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LPC2468FBD208 Summary of contents
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... ISP/IAP, USB 2.0 device/host/OTG, external memory interface Rev. 5 — 15 October 2010 1. General description NXP Semiconductors designed the LPC2468 microcontroller around a 16-bit/32-bit ARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG and embedded trace. The LPC2468 has 512 kB of on-chip high-speed flash memory. This ...
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... NXP Semiconductors 16 kB SRAM for general purpose DMA use also accessible by the USB SRAM data storage powered from the Real-Time Clock (RTC) power domain. Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention. ...
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... Type number Package Name Description plastic low profile quad flat package; 208 leads; body 28 × 28 × 1.4 mm LPC2468FBD208 LQFP208 LPC2468FET208 TFBGA208 plastic thin fine-pitch ball grid array package; 208 balls; body 15 × 15 × 0.7 mm SOT950-1 4.1 Ordering options Table 2. Ordering options ...
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... NXP Semiconductors 5. Block diagram LPC2468 P0, P1, P2, P3, P4 HIGH-SPEED GPIO 160 PINS TOTAL ETHERNET MII/RMII MAC WITH DMA EINT3 to EINT0 EXTERNAL INTERRUPTS P0 × CAP0/CAP1/ CAPTURE/COMPARE CAP2/CAP3 TIMER0/TIMER1/ 4 × MAT2/MAT3, TIMER2/TIMER3 2 × MAT0, 3 × MAT1 6 × PWM0/PWM1 PWM0, PWM1 1 × PCAP0, 2 × PCAP1 ...
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... LPC2468 pinning LQFP208 package Fig 3. LPC2468 pinning TFBGA208 package Table 3. Pin allocation table Pin Symbol Pin Symbol Row A 1 P3[27]/D27/ 2 CAP1[0]/PWM1[4] 5 P1[4]/ENET_TX_EN 6 9 P1[17]/ENET_MDIO 10 13 P3[20]/D20/ 14 PWM0[5]/DSR1 LPC2468 Product data sheet 1 LPC2468FBD208 52 ball A1 index area LPC2468FET208 J ...
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... NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol 17 P1[5]/ENET_TX_ER/ MCIPWR/PWM0[3] Row B 1 P3[2]/ P1[1]/ENET_TXD1 6 9 P4[25]/ DD(3V3) 17 P2[0]/PWM1[1]/TXD1/ TRACECLK Row C 1 P3[13]/D13 2 5 P3[9]/ DD(3V3) 13 P0[7]/I2STX_CLK/SCK1 14 /MAT2[ DD(3V3) Row D 1 TRST 2 5 P3[11]/D11 ...
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... NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol Row H 1 P0[23]/AD0[0]/ 2 I2SRX_CLK/CAP3[ SSIO Row J 1 P3[6]/ P0[16]/RXD1/ 15 SSEL0/SSEL Row K 1 VREF 2 14 P4[22]/A22/ 15 TXD2/MISO1 Row L 1 P3[7]/ n.c. 15 Row M 1 P3[15]/D15 2 14 P4[6]/A6 15 Row N ...
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... NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol 13 P2[17]/RAS 14 17 P4[20]/A20/ SDA2/SCK1 Row T 1 P0[27]/SDA0 SSIO 9 P1[24]/USB_RX_DM1/ 10 PWM1[5]/MOSI0 13 P1[28]/USB_SCL1/ 14 PCAP1[0]/MAT0[0] 17 P2[11]/EINT1/ MCIDAT1/I2STX_CLK Row U 1 USB_D− P2[23]/DYCS3/ 6 CAP3[1]/SSEL0 9 P4[0]/A0 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P0[3]/RXD0 204 D6 [1] P0[4]/ 168 B12 I2SRX_CLK/ RD2/CAP2[0] [1] P0[5]/ 166 C12 I2SRX_WS/ TD2/CAP2[1] [1] P0[6]/ 164 D13 I2SRX_SDA/ SSEL1/MAT2[0] [1] P0[7]/ 162 C13 I2STX_CLK/ SCK1/MAT2[1] [1] P0[8]/ 160 A15 I2STX_WS/ MISO1/MAT2[2] [1] P0[9]/ 158 C14 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [2] P0[12 USB_PPWR2/ MISO1/AD0[6] [2] P0[13 USB_UP_LED2/ MOSI1/AD0[7] [1] P0[14 USB_HSTEN2/ USB_CONNECT2/ SSEL1 [1] P0[15]/TXD1/ 128 J16 SCK0/SCK [1] P0[16]/RXD1/ 130 J14 SSEL0/SSEL [1] P0[17]/CTS1/ 126 K17 MISO0/MISO [1] P0[18]/DCD1/ 124 K15 MOSI0/MOSI [1] P0[19]/DSR1/ ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P0[21]/RI1/ 118 M16 MCIPWR/RD1 [1] P0[22]/RTS1/ 116 N17 MCIDAT0/TD1 [2] P0[23]/AD0[0 I2SRX_CLK/ CAP3[0] [2] P0[24]/AD0[1 I2SRX_WS/ CAP3[1] [2] P0[25]/AD0[2 I2SRX_SDA/ TXD3 [2][3] P0[26]/AD0[3 AOUT/RXD3 [4] P0[27]/SDA0 50 T1 [4] P0[28]/SCL0 48 R3 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P1[0]/ 196 A3 ENET_TXD0 [1] P1[1]/ 194 B5 ENET_TXD1 [1] P1[2]/ 185 D9 ENET_TXD2/ MCICLK/ PWM0[1] [1] P1[3]/ 177 A10 ENET_TXD3/ MCICMD/ PWM0[2] [1] P1[4]/ 192 A5 ENET_TX_EN [1] P1[5]/ 156 A17 ENET_TX_ER/ MCIPWR/ PWM0[3] [1] P1[6]/ 171 B11 ENET_TX_CLK/ MCIDAT0/ PWM0[4] ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P1[13]/ 147 D16 ENET_RX_DV [1] P1[14]/ 184 A7 ENET_RX_ER [1] P1[15]/ 182 A8 ENET_REF_CLK/ ENET_RX_CLK [1] P1[16]/ 180 D10 ENET_MDC [1] P1[17]/ 178 A9 ENET_MDIO [1] P1[18 USB_UP_LED1/ PWM1[1]/ CAP1[0] [1] P1[19 USB_TX_E1/ USB_PPWR1/ CAP1[1] [1] P1[20 USB_TX_DP1/ PWM1[2]/SCK0 [1] P1[21 USB_TX_DM1/ ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P1[24 USB_RX_DM1/ PWM1[5]/MOSI0 [1] P1[25]/ 80 T10 USB_LS1/ USB_HSTEN1/ MAT1[1] [1] P1[26]/ 82 R10 USB_SSPND1/ PWM1[6]/ CAP0[0] [1] P1[27]/ 88 T12 USB_INT1/ USB_OVRCR1/ CAP0[1] [1] P1[28]/ 90 T13 USB_SCL1/ PCAP1[0]/ MAT0[0] [1] P1[29]/ 92 U14 USB_SDA1/ PCAP1[1]/ MAT0[1] [2] P1[30 USB_PWRD2/ V /AD0[4] ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P2[1]/PWM1[2]/ 152 E14 RXD1/ PIPESTAT0 [1] P2[2]/PWM1[3]/ 150 D15 CTS1/ PIPESTAT1 [1] P2[3]/PWM1[4]/ 144 E16 DCD1/ PIPESTAT2 [1] P2[4]/PWM1[5]/ 142 D17 DSR1/ TRACESYNC [1] P2[5]/PWM1[6]/ 140 F16 DTR1/ TRACEPKT0 [1] P2[6]/PCAP1[0]/ ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [6] P2[11]/EINT1/ 108 T17 MCIDAT1/ I2STX_CLK [6] P2[12]/EINT2/ 106 N14 MCIDAT2/ I2STX_WS [6] P2[13]/EINT3/ 102 T16 MCIDAT3/ I2STX_SDA [6] P2[14]/CS2/ 91 R12 CAP2[0]/SDA1 [6] P2[15]/CS3/ 99 P13 CAP2[1]/SCL1 [1] P2[16]/CAS 87 R11 [1] P2[17]/RAS ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P2[23]/DYCS3 CAP3[1]/SSEL0 [1] P2[24 CKEOUT0 [1] P2[25 CKEOUT1 [1] P2[26 CKEOUT2/ MAT3[0]/MISO0 [1] P2[27 CKEOUT3/ MAT3[1]/MOSI0 [1] P2[28 DQMOUT0 [1] P2[29 DQMOUT1 [1] P2[30 DQMOUT2/ MAT3[2]/SDA2 [1] P2[31 DQMOUT3/ MAT3[3]/SCL2 P3[0] to P3[31] [1] P3[0]/D0 197 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P3[5]/ [1] P3[6]/ [1] P3[7]/ [1] P3[8]/D8 191 D8 [1] P3[9]/D9 199 C5 [1] P3[10]/D10 205 B2 [1] P3[11]/D11 208 D5 [1] P3[12]/D12 1 D4 [1] P3[13]/D13 7 C1 [1] P3[14]/D14 21 H2 [1] P3[15]/D15 28 M1 [1] P3[16]/D16/ 137 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P3[20]/D20/ 167 A13 PWM0[5]/DSR1 [1] P3[21]/D21/ 175 C10 PWM0[6]/DTR1 [1] P3[22]/D22/ 195 C6 PCAP0[0]/RI1 [1] P3[23]/D23 CAP0[0]/ PCAP1[0] [1] P3[24]/D24 CAP0[1]/ PWM1[1] [1] P3[25]/D25 MAT0[0]/ PWM1[2] [1] P3[26]/D26 MAT0[1]/ ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P3[30]/D30 MAT1[1]/ RTS1 [1] P3[31]/D31 MAT1[2] P4[0] to P4[31] [1] P4[0]/ [1] P4[1]/A1 79 U10 [1] P4[2]/A2 83 T11 [1] P4[3]/A3 97 U16 [1] P4[4]/A4 103 R15 [1] P4[5]/A5 107 R16 [1] P4[6]/A6 113 M14 [1] P4[7]/A7 121 L16 [1] P4[8]/A8 ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P4[15]/A15 173 A11 [1] P4[16]/A16 101 U17 [1] P4[17]/A17 104 P14 [1] P4[18]/A18 105 P15 [1] P4[19]/A19 111 P16 [1] P4[20]/A20/ 109 R17 SDA2/SCK1 [1] P4[21]/A21/ 115 M15 SCL2/SSEL1 [1] P4[22]/A22/ ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P4[29]/BLS3/ 176 B10 MAT2[1]/RXD3 [1] P4[30]/CS0 187 B7 [1] P4[31]/CS1 193 A4 [7] ALARM 37 N1 USB_D− [1][8] DBGEN 9 F4 [1][9] TDO 2 D3 [1][8] TDI 4 C2 [1][8] TMS 6 E3 [1][8] TRST ...
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... NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball V 15, 60, G3, P6, DD(3V3) 71, 89, P8, U13, 112, P17, 125, K16, 146, C17, 165, B13, C9, 181, D7 [15] 198 n.c. 30, 117, J4, L14, [16] 141 G14 V 26, 86, H4, P11, DD(DCDC)(3V3) [17] 174 D11 [18 DDA [18] VREF 24 K1 [18] ...
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... NXP Semiconductors 7. Functional description 7.1 Architectural overview The LPC2468 microcontroller consists of an ARM7TDMI-S CPU with emulation support, the ARM7 local bus for closely coupled, high-speed access to the majority of on-chip memory, the AMBA AHB interfacing to high-speed on-chip peripherals and external memory, and the AMBA APB for connection to other on-chip peripheral functions. The microcontroller permanently configures the ARM7TDMI-S processor for little-endian byte order ...
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... NXP Semiconductors The Thumb set’s 16-bit instruction length allows it to approach higher density compared to standard ARM code while retaining most of the ARM’s performance. 7.2 On-chip flash programming memory The LPC2468 incorporates 512 kB flash memory system. This memory may be used for both code and data storage ...
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... NXP Semiconductors Table 5. Address range General use 0x8000 0000 to 0xDFFF FFFF 0xE000 0000 to 0xEFFF FFFF 0xF000 0000 to 0xFFFF FFFF LPC2468 Product data sheet LPC2468 memory usage and details Address range details and description off-chip Memory four static memory banks each 0x8000 0000 - 0x80FF FFFF ...
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... NXP Semiconductors 3.75 GB Fig 4. 7.5 Interrupt controller The ARM processor core has two interrupt inputs called Interrupt Request (IRQ) and Fast Interrupt Request (FIQ). The VIC takes 32 interrupt request inputs which can be programmed as FIQ or vectored IRQ types. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted ...
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... NXP Semiconductors service routine can simply start dealing with that device. But if more than one request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC that identifies which FIQ source(s) is (are) requesting an interrupt. Vectored IRQs, which include all interrupt requests that are not classified as FIQs, have a programmable interrupt priority ...
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... NXP Semiconductors – Asynchronous page mode read – Programmable Wait States – Bus turnaround delay – Output enable and write enable delays – Extended wait • Four chip selects for synchronous memory and four chip selects for static memory devices. • ...
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... NXP Semiconductors • One AHB master for transferring data. This interface transfers data when a DMA request goes active. • 32-bit AHB master bus width. • Incrementing or non-incrementing addressing for source and destination. • Programmable DMA burst size. The DMA burst size can be programmed to more efficiently transfer data ...
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... NXP Semiconductors 7.10 Ethernet The Ethernet block contains a full featured 10 Mbit/s or 100 Mbit/s Ethernet MAC designed to provide optimized performance through the use of DMA hardware acceleration. Features include a generous suite of control registers, half or full duplex operation, flow control, control frames, hardware acceleration for transmit retry, receive packet filtering and wake-up on LAN activity ...
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... NXP Semiconductors – Wake-on-LAN power management support allows system wake-up: using the receive filters or a magic frame detection filter. • Physical interface: – Attachment of external PHY chip through standard MII or RMII interface. – PHY register access is available via the MIIM interface. ...
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... NXP Semiconductors 7.11.2.1 Features • OHCI compliant. • Two downstream ports. • Supports per-port power switching. 7.11.3 USB OTG controller USB OTG is a supplement to the USB 2.0 Specification that augments the capability of existing mobile devices and USB peripherals by adding host functionality for connection to USB peripherals ...
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... NXP Semiconductors • Acceptance Filter can provide Full CAN-style automatic reception for selected Standard Identifiers. • FullCAN messages can generate interrupts. 7.13 10-bit ADC The LPC2468 contains one ADC single 10-bit successive approximation ADC with eight channels. 7.13.1 Features • 10-bit successive approximation ADC • ...
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... NXP Semiconductors • Fractional divider for baud rate control, auto baud capabilities and FIFO control mechanism that enables software flow control implementation. • UART1 equipped with standard modem interface signals. This module also provides full support for hardware flow control (auto-CTS/RTS). ...
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... NXP Semiconductors 7.18.1 Features • The MCI interface provides all functions specific to the SD/MMC memory card. These include the clock generation unit, power management control, and command and data transfer. • Conforms to Multimedia Card Specification v2.11. • Conforms to Secure Digital Memory Card Physical Layer Specification, v0.96. ...
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... NXP Semiconductors 2 The I S-bus specification defines a 3-wire serial bus using one data line, one clock line, and one word select signal. The basic I master, and one slave. The I and receive channel, each of which can operate as either a master or a slave. 7.20.1 Features • ...
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... NXP Semiconductors 7.22 Pulse width modulator The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2468. The Timer is designed to count cycles of the system derived clock and optionally switch pins, generate interrupts or perform other actions when specified timer values occur, based on seven match registers ...
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... NXP Semiconductors • Pulse period and width can be any number of timer counts. This allows complete flexibility in the trade-off between resolution and repetition rate. All PWM outputs will occur at the same repetition rate. • Double edge controlled PWM outputs can be programmed to be either positive going or negative going pulses. • ...
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... NXP Semiconductors The VBAT pin supplies power only to the RTC and the Battery RAM. These two functions require a minimum of power to operate, which can be supplied by an external battery. When the CPU and the rest of chip functions are stopped and power is removed, the RTC can supply an alarm output that can be used by external hardware to restore chip power and resume operation ...
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... NXP Semiconductors PLLCLKIN and CCLK are the same value unless the PLL is active and connected. The clock frequency for each peripheral can be selected individually and is referred to as PCLK. Refer to 7.25.1.3 RTC oscillator The RTC oscillator can be used as the clock source for the RTC and/or the WDT. Also, the RTC oscillator can be used to drive the PLL and the CPU ...
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... NXP Semiconductors 7.25.4 Power control The LPC2468 supports a variety of power control features. There are four special modes of processor power reduction: Idle mode, Sleep mode, Power-down mode, and Deep power-down mode. The CPU clock rate may also be controlled as needed by changing clock sources, reconfiguring PLL values, and/or altering the CPU clock divider value. This allows a trade-off of power versus processing speed based on application requirements ...
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... NXP Semiconductors the meantime, the flash Wake-up Timer then counts 4 MHz IRC clock cycles to make the 100 μs flash start-up time. When it times out, access to the flash will be allowed. The customers need to reconfigure the PLL and clock dividers accordingly. 7.25.4.4 Deep power-down mode Deep power-down mode is similar to the Power-down mode, but now the on-chip regulator that supplies power to the internal logic is also shut off ...
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... NXP Semiconductors 7.26 System control 7.26.1 Reset Reset has four sources on the LPC2468: the RESET pin, the Watchdog reset, power-on reset, and the BrownOut Detection (BOD) circuit. The RESET pin is a Schmitt trigger input pin. Assertion of chip Reset by any source, once the operating voltage attains a usable ...
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... NXP Semiconductors CAUTION If level three Code Read Protection (CRP3) is selected, no future factory testing can be performed on the device. 7.26.4 AHB The LPC2468 implements two AHB in order to allow the Ethernet block to operate without interference caused by other system activity. The primary AHB, referred to as AHB1, includes the Vectored Interrupt Controller, GPDMA controller, USB interface, and 16 kB SRAM ...
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... NXP Semiconductors DCC is accessed as a coprocessor 14 by the program running on the ARM7TDMI-S core. The DCC allows the JTAG port to be used for sending and receiving data without affecting the normal program flow. The DCC data and control registers are mapped in to addresses in the EmbeddedICE logic ...
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... NXP Semiconductors 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter supply voltage DD(DCDC)(3V3) (3 analog 3.3 V pad supply voltage DDA V input voltage on pin VBAT i(VBAT) V input voltage on pin VREF ...
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... NXP Semiconductors 9. Thermal characteristics The average chip junction temperature, T equation amb • T amb • R th(j-a) • The internal power dissipation is the product of I the I/O pins is often small and many times can be negligible. However it can be significant in some applications. Table 7. Thermal characteristics − ...
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... NXP Semiconductors 10. Static characteristics Table 8. Static characteristics − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter DD(DCDC)(3V3) supply voltage (3 analog 3.3 V pad DDA supply voltage V input voltage on pin i(VBAT) VBAT ...
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... NXP Semiconductors Table 8. Static characteristics − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter Standard port pins, RESET, RTCK I LOW-level input IL current I HIGH-level input IH current I OFF-state output OZ current I I/O latch-up current latch V input voltage I V output voltage ...
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... NXP Semiconductors Table 8. Static characteristics − ° ° +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter Oscillator pins V input voltage on pin i(XTAL1) XTAL1 V output voltage on pin o(XTAL2) XTAL2 V input voltage on pin i(RTCX1) RTCX1 V output voltage on pin o(RTCX2) RTCX2 USB pins ...
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... NXP Semiconductors 10.1 Power-down mode I DD(IO) (μA) Fig 5. I (μA) Fig 6. LPC2468 Product data sheet −2 −4 −40 − 3 i(VBAT) DD(DCDC)(3V3) amb I/O maximum supply current I 40 BAT 3.3 V i(VBAT 3.0 V i(VBAT −40 − 3 DD(3V3) DD(DCDC)(3V3) RTC battery maximum supply current I mode All information provided in this document is subject to legal disclaimers ...
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... NXP Semiconductors I DD(DCDC)pd(3v3) Fig 7. 10.2 Deep power-down mode I DD(IO) (μA) Fig 8. LPC2468 Product data sheet 800 (μA) 600 400 V = 3.3 V DD(DCDC)(3V3) 200 V = 3.0 V DD(DCDC)(3V3) 0 −40 − ° 3 DD(3V3) i(VBAT) amb Total DC-to-DC converter supply current I in Power-down mode 300 ...
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... NXP Semiconductors I (μA) Fig 9. I DD(DCDC)dpd(3v3) Fig 10. Total DC-to-DC converter maximum supply current I LPC2468 Product data sheet 40 BAT 3.3 V i(VBAT 3.0 V i(VBAT −40 − 3 DD(3V3) DD(DCDC)(3V3) RTC battery maximum supply current I power-down mode 100 (μ 3.3 V DD(DCDC)(3V3 3.0 V DD(DCDC)(3V3) ...
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... NXP Semiconductors 10.3 Electrical pin characteristics V Fig 11. Typical HIGH-level output voltage V (mA) Fig 12. Typical LOW-level output current I LPC2468 Product data sheet 3 °C 25 °C 3.2 −40 °C 2.8 2.4 2 Conditions 3.3 V; standard port pins. DD(3V3 0.2 Conditions 3.3 V; standard port pins. ...
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... NXP Semiconductors 11. Dynamic characteristics Table 9. Dynamic characteristics − ° ° +85 C for commercial applications; V amb Symbol Parameter External clock f oscillator frequency osc T clock cycle time cy(clk) t clock HIGH time CHCX t clock LOW time CLCX t clock rise time CLCH t clock fall time ...
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... NXP Semiconductors 11.1 Internal oscillators Table 10. Dynamic characteristic: internal oscillators − ° ° ≤ +85 C; 3.0 V amb Symbol Parameter f internal RC oscillator frequency osc(RC) f RTC input frequency i(RTC) [1] Parameters are valid over operating temperature range unless otherwise specified. Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply voltages. ...
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... NXP Semiconductors 11.4 Flash memory Table 13. Dynamic characteristics of flash − ° ° +85 C, unless otherwise specified; V amb ground. Symbol Parameter N endurance endu t retention time ret [1] Number of program/erase cycles. [2] t specified for < 1 ppm. ret LPC2468 Product data sheet = 3 3.6 V; all voltages are measured with respect to ...
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Static external memory interface Table 14. Dynamic characteristics: Static external memory interface − ° ° pF amb DD(DCDC)(3V3) Symbol Parameter Conditions [1] Common to read and write ...
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Table 14. Dynamic characteristics: Static external memory interface − ° ° pF amb DD(DCDC)(3V3) Symbol Parameter Conditions t WE HIGH to data invalid WEHDNV time t BLS HIGH ...
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... NXP Semiconductors 11.6 Dynamic external memory interface Table 15. Dynamic characteristics: Dynamic external memory interface − ° ° pF amb Config Register = 0x0 (RD = 00) Symbol Parameter Common t chip select valid delay time d(SV) t chip select hold time h(S) t row address strobe valid delay time ...
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... NXP Semiconductors 11.7 Timing CS addr data t CSLOEL OE BLS Fig 14. External memory read access CS BLS/WE addr data OE Fig 15. External memory write access LPC2468 Product data sheet t CSLAV OELAV t OELOEH t BLSLAV t CSLAV t WELWEH t CSLWEL t BLSLBLSH t t CSLBLSL WELDV t CSLDV All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors T PERIOD differential data lines Fig 16. Differential data-to-EOP transition skew and EOP width shifting edges SCK MOSI MISO Fig 17. MISO line set-up time in SSP Master mode Fig 18. Signal timing LPC2468 Product data sheet crossover point crossover point differential data to SE0/EOP skew n × ...
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... NXP Semiconductors 12. ADC electrical characteristics Table 16. ADC static characteristics − 2 3 DDA amb Symbol Parameter V analog input voltage IA C analog input capacitance ia E differential linearity error D E integral non-linearity L(adj) E offset error O E gain error G E absolute error T R voltage source interface ...
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... NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (E (4) Integral non-linearity (E L(adj) (5) Center of a step of the actual transfer curve. Fig 19. ADC characteristics LPC2468 Product data sheet ...
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... NXP Semiconductors AD0[y] Fig 20. Suggested ADC interface - LPC2468 AD0[y] pin LPC2468 Product data sheet LPC2XXX 20 kΩ SAMPLE SSIO, SSCORE All information provided in this document is subject to legal disclaimers. Rev. 5 — 15 October 2010 LPC2468 Single-chip 16-bit/32-bit micro R vsi AD0[y] V EXT 002aad586 © NXP B.V. 2010. All rights reserved. ...
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... NXP Semiconductors 13. DAC electrical characteristics Table 17. DAC electrical characteristics − 3 3 DDA amb Symbol Parameter E differential linearity error D E integral non-linearity L(adj) E offset error O E gain error G C load capacitance L R load resistance L LPC2468 Product data sheet ° ° +85 C unless otherwise specified Conditions All information provided in this document is subject to legal disclaimers ...
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... NXP Semiconductors 14. Application information 14.1 Suggested USB interface solutions LPC24XX Fig 21. LPC2468 USB interface on a self-powered device LPC24XX Fig 22. LPC2468 USB interface on a bus-powered device LPC2468 Product data sheet V DD(3V3) USB_UP_LED USB_CONNECT soft-connect switch R1 1.5 kΩ V BUS Ω USB_D Ω USB_D− ...
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... NXP Semiconductors RSTOUT USB_SCL1 USB_SDA1 USB_INT1 USB_D+1 USB_D−1 USB_UP_LED1 LPC24XX USB_PPWR2 USB_OVRCR2 USB_PWRD2 USB_D+2 USB_D−2 USB_UP_LED2 Fig 23. LPC2468 USB OTG port configuration: USB port 1 OTG dual-role device, USB port 2 host LPC2468 Product data sheet RESET_N ADR/PSW OE_N/INT_N V DD SPEED ...
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... NXP Semiconductors RSTOUT USB_TX_E1 USB_TX_DP1 USB_TX_DM1 USB_RCV1 USB_RX_DP1 USB_RX_DM1 LPC24XX USB_SCL1 USB_SDA1 USB_INT1 USB_UP_LED1 Fig 24. LPC2468 USB OTG port configuration: VP_VM mode LPC2468 Product data sheet V DD RESET_N OE_N/INT_N DAT_VP SE0_VM RCV ISP1302 ADR/PSW SPEED SUSPEND SCL SDA INT_N V DD All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors USB_UP_LED1 USB_D+1 USB_D−1 USB_PWRD1 USB_OVRCR1 USB_PPWR1 LPC24XX USB_UP_LED2 USB_CONNECT2 USB_D+2 USB_D−2 V BUS Fig 25. LPC2468 USB OTG port configuration: USB port 2 device, USB port 1 host LPC2468 Product data sheet Ω 33 Ω 15 kΩ 15 kΩ ENA 5 V LM3526-L ...
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... NXP Semiconductors USB_UP_LED1 USB_D+1 USB_D−1 USB_PWRD1 USB_OVRCR1 USB_PPWR1 LPC24XX USB_PPWR2 USB_OVRCR2 USB_PWRD2 USB_D+2 USB_D−2 USB_UP_LED2 Fig 26. LPC2468 USB OTG port configuration: USB port 1 host, USB port 2 host 14.2 Crystal oscillator XTAL input and component selection The input voltage to the on-chip oscillators is limited to 1 the oscillator is driven by a ...
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... NXP Semiconductors In slave mode the input clock signal should be coupled by means of a capacitor of 100 pF (Figure corresponds to a square wave signal with a signal swing of between 280 mV and 1.4 V. The XTALOUT pin in this configuration can be left unconnected. External components and models used in oscillation mode are shown in ...
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... NXP Semiconductors Table 19. Fundamental oscillation frequency F 15 MHz to 20 MHz 20 MHz to 25 MHz 14.3 RTC 32 kHz oscillator component selection Fig 29. RTC oscillator modes and models: oscillation mode of operation and external The RTC external oscillator circuit is shown in integrated on chip, only a crystal, the capacitances C externally to the microcontroller ...
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... NXP Semiconductors 14.4 XTAL and RTCX Printed Circuit Board (PCB) layout guidelines The crystal should be connected on the PCB as close as possible to the oscillator input and output pins of the chip. Take care that the load capacitors C third overtone crystal usage have a common ground plane. The external components must also be connected to the ground plain ...
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... NXP Semiconductors 14.6 Reset pin configuration Fig 31. Reset pin configuration LPC2468 Product data sheet reset GLITCH FILTER All information provided in this document is subject to legal disclaimers. Rev. 5 — 15 October 2010 LPC2468 Single-chip 16-bit/32-bit micro ESD ESD V SS 002aaf274 © NXP B.V. 2010. All rights reserved. ...
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... NXP Semiconductors 15. Package outline LQFP208; plastic low profile quad flat package; 208 leads; body 1 156 157 pin 1 index 208 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.45 mm 1.6 0.25 0.05 1.35 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors TFBGA208: plastic thin fine-pitch ball grid array package; 208 balls; body 0.7 mm ball A1 index area ball index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.4 0.8 0.5 mm 1.2 0.3 0.6 0.4 OUTLINE VERSION IEC SOT950-1 Fig 33. Package outline SOT950-1 (TFBGA208) ...
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... NXP Semiconductors 16. Abbreviations Table 21. Acronym ADC AHB AMBA APB BLS BOD CAN DAC DCC DMA EOP ETM GPIO IrDA JTAG MII OHC OHCI OTG PHY PLL PWM RMII SD/MMC SE0 SPI SSI SSP TTL UART USB LPC2468 Product data sheet Acronym list ...
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... NXP Semiconductors 17. Revision history Table 22. Revision history Document ID Release date LPC2468 v.5 20101015 • Modifications: Section 2 “Features and • Section 7.24 “RTC and battery • Section 7.25.2 • Section 7.25.3 “Wake-up • Section 7.25.4 “Power • Table 4 “Pin pins. • Table 4 “Pin • ...
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... NXP Semiconductors Table 22. Revision history …continued Document ID Release date • Added • Added • Added • Moved below • Updated LPC2468 v.4 20081017 • Modifications: Added Table 14 “Dynamic characteristics: Static external memory interface”. • Added Figure 14 “External memory read access” and Figure 15 “External memory write access” ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... For sales office addresses, please send an email to: LPC2468 Product data sheet own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 Functional description . . . . . . . . . . . . . . . . . . 24 7.1 Architectural overview . . . . . . . . . . . . . . . . . . 24 7.2 On-chip flash programming memory . . . . . . . 25 7.3 On-chip SRAM . . . . . . . . . . . . . . . . . . . . . . . . 25 7 ...
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... NXP Semiconductors 11.5 Static external memory interface . . . . . . . . . . 59 11.6 Dynamic external memory interface . . . . . . . . 61 11.7 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 12 ADC electrical characteristics . . . . . . . . . . . . 64 13 DAC electrical characteristics . . . . . . . . . . . . 67 14 Application information 14.1 Suggested USB interface solutions . . . . . . . . 68 14.2 Crystal oscillator XTAL input and component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 14.3 RTC 32 kHz oscillator component selection . . 74 14 ...