8BIT MCU, 32K FLASH, 1K RAM, LQFP52

 

MB95F116JSPMC-GE1

Manufacturer Part NumberMB95F116JSPMC-GE1
Description8BIT MCU, 32K FLASH, 1K RAM, LQFP52
ManufacturerFujitsu
MB95F116JSPMC-GE1 datasheets

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Warranty: 60 days

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Specifications of MB95F116JSPMC-GE1

Controller Family/seriesF2MC-8FXNo. Of I/o's39
Ram Memory Size1KBCpu Speed16.25MHz
No. Of Timers7No. Of PwmRoHS Compliant
Core Size8bitProgram Memory Size32KB
Oscillator TypeExternal Only  
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MB95110M Series
(Continued)
Sym-
Pin
Parameter
bol
name
SCL0
Data hold time
t
HD;DAT
SDA0
SCL0
Data setup time
t
SU;DAT
SDA0
SDA ↓ → SCL↑
SCL0
t
WAKEUP
(at wake-up function)
SDA0
*1 : R, C : Pull-up resistor and load capacitor of the SCL and SDA lines.
*2 : • Refer to “ (2) Source Clock/Machine Clock” for t
• m is CS4 bit and CS3 bit (bit 4 and bit 3) of clock control register (ICCR0) .
• n is CS2 bit to CS0 bit (bit 2 to bit 0) of clock control register (ICCR0) .
• Actual timing of I
2
C is determined by m and n values set by the machine clock (t
ICCR0 register.
• Standard-mode :
m and n can be set at the range : 0.9 MHz < t
Setting of m and n limits the machine clock that can be used below.
(m, n) = (1, 8)
(m, n) = (1, 22) , (5, 4) , (6, 4) , (7, 4) , (8, 4) : 0.9 MHz < t
(m, n) = (1, 38) , (5, 8) , (6, 8) , (7, 8) , (8, 8) : 0.9 MHz < t
(m, n) = (1, 98)
• Fast-mode :
m and n can be set at the range : 3.3 MHz < t
Setting of m and n limits the machine clock that can be used below.
(m, n) = (1, 8)
: 3.3 MHz < t
(m, n) = (1, 22) , (5, 4)
: 3.3 MHz < t
(m, n) = (6, 4)
: 3.3 MHz < t
56
(Vcc = 5.0 V ± 10%, AVss = Vss = 0.0 V, T
Value*
2
Condi-
tions
Min
0
R = 1.7 kΩ,
− 20
t
MCLK
C = 50 pF*
1
Oscillation stabilization
wait time +
− 20
2 t
MCLK
.
MCLK
(machine clock) < 10 MHz.
MCLK
≤ 1 MHz
: 0.9 MHz < t
MCLK
≤ 2 MHz
MCLK
≤ 4 MHz
MCLK
≤ 10 MHz
: 0.9 MHz < t
MCLK
(machine clock) < 10 MHz.
MCLK
≤ 4 MHz
MCLK
≤ 8 MHz
MCLK
≤ 10 MHz
MCLK
= −40 °C to + 85 °C)
A
Unit
Remarks
Max
⎯
ns
At reception
⎯
ns
At reception
⎯
ns
) and CS4 to CS0 of
MCLK
DS07-12611-6E

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