AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 102

• Manufacturer Part Number: AU80610004653AAS LBMG
• Description: MPU, ATOM PROCESSOR, N450, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - N400r

Specifications of AU80610004653AAS LBMG

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.6.27
102
31:9
7:1
Bit
8
0
Access
RWC/P
RWC/P
PMSTS - Power Management Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register is Reset by PWROK only.
RO
RO
000000h
Default
Value
00h
0b
0b
RST/PWR
Core
Core
Core
Core
Reserved
Warm Reset Occurred (WRO):
Set by the PMunit whenever a ResetWarn is received,
and cleared by PWROK=0.
BIOS Requirement: BIOS can check and clear this bit
whenever executing POST code. This way BIOS knows
that if the bit is set, then the PMSTS bits [1:0] must also
be set, and if not BIOS needs to power-cycle the
platform.
Reserved
Channel 0 in Self-Refresh (C0SR):
Set by power management hardware after Channel 0 is
placed in self refresh as a result of a Power State or a
Reset Warn sequence.
Cleared by Power management hardware before starting
Channel 0 self refresh exit sequence initiated by a power
management exit.
Cleared by the BIOS by writing a “1” in a warm reset
(Reset# asserted while pwrok is asserted) exit sequence.
0/0/0/MCHBAR
F14-F17h
00000000h
32 bits
RO; RWC/P;
0: No Warm Reset occurred.
1: Warm Reset occurred.
0: Channel 0 not guaranteed to be in self refresh.
1: Channel 0 in Self Refresh.
Processor Configuration Registers
Description
Datasheet