AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 106

• Manufacturer Part Number: AU80610004653AAS LBMG
• Description: MPU, ATOM PROCESSOR, N450, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - N400r

Specifications of AU80610004653AAS LBMG

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.7.4
1.7.5
106
31:24
22:16
15:4
14:8
3:1
Bit
Bit
23
15
0
Access
Access
DMIPVCCTL - DMI Port VC Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
RW
DMIVC0RCAP - DMI VC0 Resource Capability
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
RO
RO
RO
RO
RO
RO
RO
Default
Default
Value
Value
000h
000b
00h
00h
00h
0b
0b
0b
RST/PWR
RST/PWR
Core
Core
Core
Core
Core
Core
Core
Core
Reserved
VC Arbitration Select (VCAS):
possible value as indicated in the VC Arbitration
Capability field.
the VC arbitration scheme is hardware fixed (in the root
complex). This field cannot be modified when more than
one VC in the LPVC group is enabled.
Robin
Reserved
Reserved for Port Arbitration Table Offset
Reserved
Reserved for Maximum Time Slots
Reject Snoop Transactions (REJSNPT):
within the TLP header are allowed on this VC.
attribute is applicable but is not Set within the TLP
Header will be rejected as an Unsupported Request.
Reserved
This field will be programmed by software to the only
The value 000b when written to this field will indicate
000: Hardware fixed arbitration scheme. E.G. Round
Others: Reserved
See the PCI express specification for more details
0:Transactions with or without the No Snoop bit set
0/0/0/DMIBAR
C-Dh
0000h
16 bits
0/0/0/DMIBAR
10-13h
00000001h
32 bits
RO; RW;
RO;
1: When Set, any transaction for which the No Snoop
Processor Configuration Registers
Description
Description
Datasheet