AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 129
AU80610004653AAS LBMG
Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet
1.AU80610004653AAS_LBMG.pdf
(171 pages)
Specifications of AU80610004653AAS LBMG
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.9.5
Datasheet
2:0
7:0
Bit
Bit
8
7
6
5
4
3
Access
Access
RID2 - Revision Identification
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the revision number for Device #2 Functions 0 and 1.
RO
RO
RO
RO
RO
RO
RO
RO
Default
Default
Value
Value
000b
00h
0b
1b
0b
0b
1b
0b
RST/PWR
RST/PWR
Core
Core
Core
Core
Core
Core
Core
Core
Master Data Parity Error Detected (DPD):
Since Parity Error Response is hardwired to disabled (and
the IGD does not do any parity detection), this bit is
hardwired to 0.
Fast Back-to-Back (FB2B):
Hardwired to 1. The IGD accepts fast back-to-back when
the transactions are not to the same agent.
User Defined Format (UDF):
Hardwired to 0.
66 MHz PCI Capable (66C):
N/A - Hardwired to 0.
Capability List (CLIST):
This bit is set to 1 to indicate that the register at 34h
provides an offset into the function's PCI Configuration
Space containing a pointer to the location of the first
item in the list.
Interrupt Status (INTSTS):
This bit reflects the state of the interrupt in the device.
Only when the Interrupt Disable bit in the command
register is a 0 and this Interrupt Status bit is a 1, will the
devices INTx# signal be asserted.
Reserved
Revision Identification Number (RID):
This is an 8-bit value that indicates the revision
identification number for the processor Device 0. For the
A-0 Stepping, this value is 00h. [Intel Reserved text: For
the A-1 Stepping, the CRID value is 00h and the SRID
value is 01h. SRID bit 7 will be set to 1 for discrete Die
and 0 for Integrated Die]
0/2/0/PCI
8h
00h
8 bits
RO;
Description
Description
129
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