AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 155
AU80610004653AAS LBMG
Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet
1.AU80610004653AAS_LBMG.pdf
(171 pages)
Specifications of AU80610004653AAS LBMG
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.10.6
1.10.7
Datasheet
CC - Class Code Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains the device programming interface information related to the Sub-
Class Code and Base Class Code definition for the IGD. This register also contains the
Base Class Code and the function sub-class in relation to the Base Class Code.
CLS - Cache Line Size
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The IGD does not support this register as a PCI slave.
23:16
15:8
7:0
7:0
Bit
Bit
Access
Access
RO
RO
RO
RO
Default
Default
Value
Value
03h
80h
00h
00h
0/2/1/PCI
9-Bh
038000h
24 bits
0/2/1/PCI
Ch
00h
8 bits
RST/PWR
RST/PWR
RO;
RO;
Core
Core
Core
Core
Base Class Code (BCC):
This is an 8-bit value that indicates the
base class code for the processor. This
code has the value 03h, indicating a
Display Controller.
Sub-Class Code (SUBCC):
80h: Non VGA
Programming Interface (PI):
00h: Hardwired as a Display controller.
Cache Line Size (CLS):
This field is hardwired to 0s. The IGD as
a PCI compliant master does not use the
Memory Write and Invalidate command
and, in general, does not perform
operations based on cache line size.
Description
Description
155
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