AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 21
AU80610004653AAS LBMG
Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet
1.AU80610004653AAS_LBMG.pdf
(171 pages)
Specifications of AU80610004653AAS LBMG
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.2.3.1
Datasheet
Figure 1-4. PCI Memory Address Range
APIC Configuration Space (FEC0_0000h-FECF_FFFFh)
This range is reserved for APIC configuration space which includes the default I/O APIC
configuration space from FEC0_0000h to FEC7_0FFFh. The default Local (CPU) APIC
configuration space goes from FEC8_0000h to FECF_FFFFh.
CPU accesses to the Local APIC configuration space do not result in external bus
activity since the Local APIC configuration space is internal to the CPU. However, an
MTRR must be programmed to make the Local APIC range uncacheable (UC). The Local
APIC base address in each CPU should be relocated to the FEC0_0000h (4 GB-20 MB)
FFFF_FFFFh
FEE0_0000h
FED0_0000h
FEC8_0000h
FEC0_0000h
FFE0_0000h
FEF0_0000h
F000_0000h
E000_0000h
PCI Express Configuration
(subtractive decode)
(subtractive decode)
(subtractive decode)
(subtractive decode)
Local (CPU) APIC
FSB Interrupts
DMI Interface
DMI Interface
DMI Interface
DMI Interface
High BIOS
I/O APIC
Space
4GB - 20MB
4GB - 2MB
4GB - 17MB
4GB - 18MB
4GB - 19MB
4GB - 256MB
4GB - 512MB
TOLUD
4GB
Internal Graphics ranges
Optional HSEG
FEDA_0000h to
FEDB_FFFFh
Possible
address
range
PCI Express Port
21
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