AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 41

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AU80610004653AAS LBMG

Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet

Specifications of AU80610004653AAS LBMG

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Processor Configuration Registers
1.5.11
1.5.12
Datasheet
CAPPTR - Capabilities Pointer
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The CAPPTR provides the offset that is the pointer to the location of the first device
capability in the capability list.
PXPEPBAR - PCI Express Egress Port Base Address
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This is the base address for the PCI Express Egress Port MMIO Configuration space.
There is no physical memory within this 4KB window that can be addressed. The 4KB
reserved by this register does not alias to any PCI 2.3 compliant memory mapped
space. On reset, the EGRESS port MMIO configuration space is disabled and must be
enabled by writing a 1 to PXPEPBAREN [Dev 0, offset 40h, bit 0].
7:0
Bit
Access
RO
Default
Value
E0h
0/0/0/PCI
34h
E0h
RO
8 bits
0/0/0/PCI
40-47h
0000000000000000h
RW-L; RO
64 bits
RST/
PWR
Core
Capabilities Pointer (CAPPTR)
Pointer to the offset of the first capability
ID register block. In this case the first
capability is the product-specific
Capability Identifier (CAPID0).
Description
41

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