AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 43
AU80610004653AAS LBMG
Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet
1.AU80610004653AAS_LBMG.pdf
(171 pages)
Specifications of AU80610004653AAS LBMG
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
1.5.13
Datasheet
MCHBAR - Processor Memory Mapped Register Range Base
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This is the base address for the processor Memory Mapped Configuration space. There
is no physical memory within this 16KB window that can be addressed. The 16KB
reserved by this register does not alias to any PCI 2.3 compliant memory mapped
space. On reset, the processor MMIO Memory Mapped Configuation space is disabled
and must be enabled by writing a 1 to MCHBAREN [Dev 0, offset48h, bit 0]
The register space contains memory control, initialization, timing, and buffer strength
registers; clocking registers; and power and thermal management registers.
63:36
35:14
13:1
Bit
0
Access
RW-L
RW-L
RO
RO
0000000h
000000h
Default
Value
0000h
0b
0/0/0/PCI
48-4Fh
0000000000000000h
RW-L; RO
64 bits
RST/
PWR
Core
Core
Core
Core
Reserved
Processor Memory Mapped Base
Address (MCHBAR)
This field corresponds to bits 35 to 14 of
the base address processor Memory
Mapped configuration space. BIOS will
program this register resulting in a base
address for a 16KB block of contiguous
memory address space. This register
ensures that a naturally aligned 16KB
space is allocated. System Software uses
this base address to program the
processor Memory Mapped register set.
Reserved
MCHBAR Enable (MCHBAREN):
0: MCHBAR is disabled and does not claim
any memory
1: MCHBAR memory mapped accesses
are claimed and decoded appropriately
Description
43
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