AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 45

• Manufacturer Part Number: AU80610004653AAS LBMG
• Description: MPU, ATOM PROCESSOR, N450, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - N400r

Specifications of AU80610004653AAS LBMG

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Processor Configuration Registers
1.5.15
Datasheet
Bit
1
0
Access
RW-L
RO
DEVEN - Device Enable
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Allows for enabling/disabling of PCI devices and functions that are within the processor.
The table below the bit definitions describes the behavior of all combinations of
transactions to devices controlled by this register.
31:15
13:5
Bit
14
4
Default
Value
0b
0b
Access
RW-L
RW-L
RO
RO
RST/
PWR
Core
Core
Default
00000h
Value
IGD VGA Disable (IVD):
the Sub-Class Code within Device 2 Class Code register is 00.
IO), and the Sub- Class Code field within Device 2 function 0 Class
Code register is 80.
BIOS Requirement: BIOS must not set this bit to 0 if the GMS field
(bits 6:4 of this register) pre-allocates no memory. This bit MUST
be set to 1 if Device 2 is disabled either via a fuse or fuse override
(CAPID0[46] = 1) or via a register (DEVEN[3] = 0).
Reserved
000h
0b
1b
0: Enable. Device 2 (IGD) claims VGA memory and IO cycles,
1: Disable. Device 2 (IGD) does not claim VGA cycles (Mem and
0/0/0/PCI
54-57h
00000019h
32 bits
RO; RW-L;
RST/
PWR
Core
Core
Core
Core
Reserved
Reserved
Reserved
Internal Graphics Engine Function 1
(D2F1EN):
0: Bus 0 Device 2 Function 1 is disabled
and hidden
1: Bus 0 Device 2 Function 1 is enabled
and visible
If Device 2 Function 0 is disabled and
hidden, then Device 2 Function 1 is also
disabled and hidden independent of the
state of this bit.
If this component is not capable of Dual
Independent Display (CAPID0[40] = 1)
then this bit is hardwired to 0b to hide
Device 2 Function 1.
Description
Description
45