AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 58

• Manufacturer Part Number: AU80610004653AAS LBMG
• Description: MPU, ATOM PROCESSOR, N450, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - N400r

Specifications of AU80610004653AAS LBMG

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.5.27
1.5.28
58
Bit
7
6
Access
RW-L
REMAPLIMIT - Remap Limit Address Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
SMRAM - System Management RAM Control
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
spaces are treated. The Open, Close, and Lock bits function only when G_SMRAME bit
is set to a 1. Also, the OPEN bit must be reset before the LOCK bit is set.
RO
The SMRAMC register controls how accesses to Compatible and Extended SMRAM
15:10
9:0
Bit
Default
Value
Access
0b
0b
RW-L
RO
RST/
PWR
000000b
Default
Core
Core
Value
000h
Reserved
SMM Space Open (D_OPEN):
When D_OPEN=1 and D_LCK=0, the SMM space DRAM is
made visible even when SMM decode is not active. This is
intended to help BIOS initialize SMM space. Software
should ensure that D_OPEN=1 and D_CLS=1 are not set
at the same time.
0/0/0/PCI
9A-9Bh
0000h
16 bits
0/0/0/PCI
9Dh
02h
8 bits
RO; RW-L;
RO; RW-L; RW; RW-L-K;
RST/
PWR
Core
Core
Reserved
Remap Limit Address [35:26]
(REMAPLMT):
The value in this register defines the
upper boundary of the Remap window.
The Remap window is inclusive of this
address. In the decoder A[25:0] of the
remap limit address are assumed to be
F's. Thus the top of the defined range will
be one less than a 64MB boundary.
When the value in this register is less
than the value programmed into the
Remap Base register, the Remap window
is disabled.
Processor Configuration Registers
Description
Description
Datasheet