AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 59

• Manufacturer Part Number: AU80610004653AAS LBMG
• Description: MPU, ATOM PROCESSOR, N450, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - N400r

Specifications of AU80610004653AAS LBMG

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Processor Configuration Registers
Datasheet
2:0
Bit
5
4
3
Access
RW-L-K
RW-L
RW
RO
Default
Value
010b
0b
0b
0b
RST/
PWR
Core
Core
Core
Core
SMM Space Closed (D_CLS):
When D_CLS = 1 SMM space DRAM is not accessible to
data references, even if SMM decode is active. Code
references may still access SMM space DRAM. This will
allow SMM software to reference through SMM space to
update the display even when SMM is mapped over the
VGA range. Software should ensure that D_OPEN=1 and
D_CLS=1 are not set at the same time.
SMM Space Locked (D_LCK):
When D_LCK is set to 1 then D_OPEN is reset to 0 and
D_LCK, D_OPEN, C_BASE_SEG, H_SMRAM_EN, TSEG_SZ
and TSEG_EN become read only. D_LCK can be set to 1
via a normal configuration space write but can only be
cleared by a Full Reset. The combination of D_LCK and
D_OPEN provide convenience with security. The BIOS can
use the D_OPEN function to initialize SMM space and then
use D_LCK to “lock down” SMM space in the future so
that no application software (or BIOS itself) can violate
the integrity of SMM space, even if the program has
knowledge of the D_OPEN function.
Global SMRAM Enable (G_SMRAME):
If set to a 1, then Compatible SMRAM functions are
enabled, providing 128 KB of DRAM accessible at the
A0000h address while in SMM (ADSB with SMM decode).
To enable Extended SMRAM function this bit has be set to
1. Refer to the section on SMM for more details. Once
D_LCK is set, this bit becomes read only.
Compatible SMM Space Base Segment
(C_BASE_SEG):
This field indicates the location of SMM space. SMM DRAM
is not remapped. It is simply made visible if the
conditions are right to access SMM space, otherwise the
access is forwarded to DMI. Since the processor supports
only the SMM space between A0000 and BFFFF, this field
is hardwired to 010.
Description
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